Commit 2fa7937b authored by Atsushi Nemoto's avatar Atsushi Nemoto Committed by Ralf Baechle
Browse files

[MIPS] Make I8259A_IRQ_BASE customizable 



Move I8259A_IRQ_BASE from asm/i8259.h to asm/mach-generic/irq.h and
make it really customizable.  And remove I8259_IRQ_BASE declared on
some platforms.  Currently only NEC_CMBVR4133 is using custom
I8259A_IRQ_BASE value.

Signed-off-by: default avatarAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 97dcb82d

arch/mips/ddb5xxx/ddb5477/irq.c

+2 −3
Original line number Diff line number Diff line
@@ -146,8 +146,7 @@ u8 i8259_interrupt_ack(void) 
	irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE);

	ddb_out32(DDB_PCIINIT10, reg);



	/* i8259.c set the base vector to be 0x0 */

	return irq + I8259_IRQ_BASE;

	return irq;

}

/*

 * the first level int-handler will jump here if it is a vrc5477 irq
@@ -177,7 +176,7 @@ static void vrc5477_irq_dispatch(void) 
		/* check for i8259 interrupts */

		if (intStatus & (1 << VRC5477_I8259_CASCADE)) {

			int i8259_irq = i8259_interrupt_ack();

			do_IRQ(I8259_IRQ_BASE + i8259_irq);

			do_IRQ(i8259_irq);

			return;

		}

	}

arch/mips/kernel/i8259.c

+14 −6
Original line number Diff line number Diff line
@@ -54,9 +54,11 @@ static unsigned int cached_irq_mask = 0xffff; 


void disable_8259A_irq(unsigned int irq)

{

	unsigned int mask = 1 << irq;

	unsigned int mask;

	unsigned long flags;



	irq -= I8259A_IRQ_BASE;

	mask = 1 << irq;

	spin_lock_irqsave(&i8259A_lock, flags);

	cached_irq_mask |= mask;

	if (irq & 8)
@@ -68,9 +70,11 @@ void disable_8259A_irq(unsigned int irq) 


void enable_8259A_irq(unsigned int irq)

{

	unsigned int mask = ~(1 << irq);

	unsigned int mask;

	unsigned long flags;



	irq -= I8259A_IRQ_BASE;

	mask = ~(1 << irq);

	spin_lock_irqsave(&i8259A_lock, flags);

	cached_irq_mask &= mask;

	if (irq & 8)
@@ -82,10 +86,12 @@ void enable_8259A_irq(unsigned int irq) 


int i8259A_irq_pending(unsigned int irq)

{

	unsigned int mask = 1 << irq;

	unsigned int mask;

	unsigned long flags;

	int ret;



	irq -= I8259A_IRQ_BASE;

	mask = 1 << irq;

	spin_lock_irqsave(&i8259A_lock, flags);

	if (irq < 8)

		ret = inb(PIC_MASTER_CMD) & mask;
@@ -134,9 +140,11 @@ static inline int i8259A_irq_real(unsigned int irq) 
 */

void mask_and_ack_8259A(unsigned int irq)

{

	unsigned int irqmask = 1 << irq;

	unsigned int irqmask;

	unsigned long flags;



	irq -= I8259A_IRQ_BASE;

	irqmask = 1 << irq;

	spin_lock_irqsave(&i8259A_lock, flags);

	/*

	 * Lightweight spurious IRQ detection. We do not want
@@ -322,8 +330,8 @@ void __init init_i8259_irqs (void) 


	init_8259A(0);



	for (i = 0; i < 16; i++)

	for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++)

		set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq);



	setup_irq(PIC_CASCADE_IR, &irq2);

	setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2);

}

arch/mips/pci/fixup-vr4133.c

+2 −11
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
#include <linux/pci.h>



#include <asm/io.h>

#include <asm/i8259.h>

#include <asm/vr41xx/cmbvr4133.h>



extern int vr4133_rockhopper;
@@ -160,17 +161,7 @@ int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) 
#ifdef CONFIG_ROCKHOPPER

void i8259_init(void)

{

	outb(0x11, 0x20);		/* Master ICW1 */

	outb(I8259_IRQ_BASE, 0x21);	/* Master ICW2 */

	outb(0x04, 0x21);		/* Master ICW3 */

	outb(0x01, 0x21);		/* Master ICW4 */

	outb(0xff, 0x21);		/* Master IMW */



	outb(0x11, 0xa0);		/* Slave ICW1 */

	outb(I8259_IRQ_BASE + 8, 0xa1);	/* Slave ICW2 */

	outb(0x02, 0xa1);		/* Slave ICW3 */

	outb(0x01, 0xa1);		/* Slave ICW4 */

	outb(0xff, 0xa1);		/* Slave IMW */

	init_i8259_irqs();



	outb(0x00, 0x4d0);

	outb(0x02, 0x4d1);	/* USB IRQ9 is level */

arch/mips/vr41xx/nec-cmbvr4133/irq.c

+2 −51
Original line number Diff line number Diff line
@@ -21,60 +21,16 @@ 
#include <linux/interrupt.h>



#include <asm/io.h>

#include <asm/i8259.h>

#include <asm/vr41xx/cmbvr4133.h>



extern void enable_8259A_irq(unsigned int irq);

extern void disable_8259A_irq(unsigned int irq);

extern void mask_and_ack_8259A(unsigned int irq);

extern void init_8259A(int hoge);



extern int vr4133_rockhopper;



static void enable_i8259_irq(unsigned int irq)

{

	enable_8259A_irq(irq - I8259_IRQ_BASE);

}



static void disable_i8259_irq(unsigned int irq)

{

	disable_8259A_irq(irq - I8259_IRQ_BASE);

}



static void ack_i8259_irq(unsigned int irq)

{

	mask_and_ack_8259A(irq - I8259_IRQ_BASE);

}



static struct irq_chip i8259_irq_type = {

	.typename       = "XT-PIC",

	.ack            = ack_i8259_irq,

	.mask		= disable_i8259_irq,

	.mask_ack	= ack_i8259_irq,

	.unmask		= enable_i8259_irq,

};



static int i8259_get_irq_number(int irq)

{

	unsigned long isr;



	isr = inb(0x20);

	irq = ffz(~isr);

	if (irq == 2) {

		isr = inb(0xa0);

		irq = 8 + ffz(~isr);

	return i8259_irq();

}



	if (irq < 0 || irq > 15)

		return -EINVAL;



	return I8259_IRQ_BASE + irq;

}



static struct irqaction i8259_slave_cascade = {

	.handler        = &no_action,

	.name           = "cascade",

};



void __init rockhopper_init_irq(void)

{

	int i;
@@ -84,11 +40,6 @@ void __init rockhopper_init_irq(void) 
		return;

	}



	for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)

		set_irq_chip_and_handler(i, &i8259_irq_type, handle_level_irq);



	setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);



	vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);

	vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH);

	vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number);

include/asm-mips/ddb5xxx/ddb5477.h

+16 −20
Original line number Diff line number Diff line
@@ -252,12 +252,8 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq); 
 */



#define	NUM_CPU_IRQ		8

#define	NUM_I8259_IRQ		16

#define	NUM_VRC5477_IRQ		32



#define	DDB_IRQ_BASE		0



#define	I8259_IRQ_BASE		DDB_IRQ_BASE

#define	CPU_IRQ_BASE		MIPS_CPU_IRQ_BASE

#define	VRC5477_IRQ_BASE	(CPU_IRQ_BASE + NUM_CPU_IRQ)
@@ -301,22 +297,22 @@ extern void ll_vrc5477_irq_disable(int vrc5477_irq); 
/*

 * i2859 irq assignment

 */

#define I8259_IRQ_RESERVED_0	(0 + I8259_IRQ_BASE)

#define I8259_IRQ_KEYBOARD	(1 + I8259_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_CASCADE	(2 + I8259_IRQ_BASE)

#define I8259_IRQ_UART_B	(3 + I8259_IRQ_BASE)	/* M1543 default, may conflict with RTC according to schematic diagram  */

#define I8259_IRQ_UART_A	(4 + I8259_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_PARALLEL	(5 + I8259_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_RESERVED_6	(6 + I8259_IRQ_BASE)

#define I8259_IRQ_RESERVED_7	(7 + I8259_IRQ_BASE)

#define I8259_IRQ_RTC		(8 + I8259_IRQ_BASE)	/* who set this? */

#define I8259_IRQ_USB		(9 + I8259_IRQ_BASE)	/* ddb_setup */

#define I8259_IRQ_PMU		(10 + I8259_IRQ_BASE)	/* ddb_setup */

#define I8259_IRQ_RESERVED_11	(11 + I8259_IRQ_BASE)

#define I8259_IRQ_RESERVED_12	(12 + I8259_IRQ_BASE)	/* m1543_irq_setup */

#define I8259_IRQ_RESERVED_13	(13 + I8259_IRQ_BASE)

#define I8259_IRQ_HDC1		(14 + I8259_IRQ_BASE)	/* default and ddb_setup */

#define I8259_IRQ_HDC2		(15 + I8259_IRQ_BASE)	/* default */

#define I8259_IRQ_RESERVED_0	(0 + I8259A_IRQ_BASE)

#define I8259_IRQ_KEYBOARD	(1 + I8259A_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_CASCADE	(2 + I8259A_IRQ_BASE)

#define I8259_IRQ_UART_B	(3 + I8259A_IRQ_BASE)	/* M1543 default, may conflict with RTC according to schematic diagram  */

#define I8259_IRQ_UART_A	(4 + I8259A_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_PARALLEL	(5 + I8259A_IRQ_BASE)	/* M1543 default */

#define I8259_IRQ_RESERVED_6	(6 + I8259A_IRQ_BASE)

#define I8259_IRQ_RESERVED_7	(7 + I8259A_IRQ_BASE)

#define I8259_IRQ_RTC		(8 + I8259A_IRQ_BASE)	/* who set this? */

#define I8259_IRQ_USB		(9 + I8259A_IRQ_BASE)	/* ddb_setup */

#define I8259_IRQ_PMU		(10 + I8259A_IRQ_BASE)	/* ddb_setup */

#define I8259_IRQ_RESERVED_11	(11 + I8259A_IRQ_BASE)

#define I8259_IRQ_RESERVED_12	(12 + I8259A_IRQ_BASE)	/* m1543_irq_setup */

#define I8259_IRQ_RESERVED_13	(13 + I8259A_IRQ_BASE)

#define I8259_IRQ_HDC1		(14 + I8259A_IRQ_BASE)	/* default and ddb_setup */

#define I8259_IRQ_HDC2		(15 + I8259A_IRQ_BASE)	/* default */





/*

CRA Git | Maintained and supported by SUSTech CRA and CCSE