Commit 2f98492c authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Expose physical addressing mode through cpuinfo. 



CPUs can be in either the legacy 29-bit or 32-bit physical addressing
modes. This follows the x86 approach of tracking the phys bits in cpuinfo
and exposing it to userspace through procfs.

This change was requested to permit kexec-tools to detect the physical
addressing mode in order to determine the appropriate address mangling.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent b18cae42

arch/sh/include/asm/processor.h

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ struct sh_cpuinfo { 
	struct task_struct *idle;

#endif



	unsigned int phys_bits;

	unsigned long flags;

} __attribute__ ((aligned(L1_CACHE_BYTES)));

arch/sh/kernel/cpu/init.c

+2 −0
Original line number Diff line number Diff line
@@ -340,6 +340,8 @@ asmlinkage void __cpuinit cpu_init(void) 
	 */

	current_cpu_data.asid_cache = NO_CONTEXT;



	current_cpu_data.phys_bits = __in_29bit_mode() ? 29 : 32;



	speculative_execution_init();

	expmask_init();

arch/sh/kernel/setup.c

+3 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = { 
		.type			= CPU_SH_NONE,

		.family			= CPU_FAMILY_UNKNOWN,

		.loops_per_jiffy	= 10000000,

		.phys_bits		= MAX_PHYSMEM_BITS,

	},

};

EXPORT_SYMBOL(cpu_data);
@@ -432,6 +433,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
	if (c->flags & CPU_HAS_L2_CACHE)

		show_cacheinfo(m, "scache", c->scache);



	seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);



	seq_printf(m, "bogomips\t: %lu.%02lu\n",

		     c->loops_per_jiffy/(500000/HZ),

		     (c->loops_per_jiffy/(5000/HZ)) % 100);

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