Commit 2f6ba2b3 authored by Konstantinos Tsimpoukas's avatar Konstantinos Tsimpoukas Committed by Takashi Iwai
Browse files

ALSA: ice1712: Correcting/completing #defines for REGS



This small patch completes #defines for Control/Status Register,
adds comments for the missing ones there and on the Interrupt Mask
Register and additionally corrects "#define ICE1712_SERR_LEVEL 0x04 -> 0x08",
according to documentation.

Signed-off-by: default avatarKonstantinos Tsimpoukas <kostaslinuxxx@gmail.com>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 1a0e3f96
Loading
Loading
Loading
Loading
+9 −6
Original line number Diff line number Diff line
@@ -41,14 +41,17 @@
#define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x)

#define ICE1712_REG_CONTROL		0x00	/* byte */
#define   ICE1712_RESET			0x80	/* reset whole chip */
#define   ICE1712_SERR_LEVEL		0x04	/* SERR# level otherwise edge */
#define   ICE1712_RESET			0x80	/* soft reset whole chip */
#define   ICE1712_SERR_ASSERT_DS_DMA	0x40    /* disabled SERR# assertion for the DS DMA Ch-C irq otherwise enabled */
#define   ICE1712_DOS_VOL		0x10    /* DOS WT/FM volume control */
#define   ICE1712_SERR_LEVEL		0x08	/* SERR# level otherwise edge */
#define   ICE1712_SERR_ASSERT_SB	0x02	/* disabled SERR# assertion for SB irq otherwise enabled */
#define   ICE1712_NATIVE		0x01	/* native mode otherwise SB */
#define ICE1712_REG_IRQMASK		0x01	/* byte */
#define   ICE1712_IRQ_MPU1		0x80
#define   ICE1712_IRQ_TIMER		0x40
#define   ICE1712_IRQ_MPU2		0x20
#define   ICE1712_IRQ_PROPCM		0x10
#define   ICE1712_IRQ_MPU1		0x80	/* MIDI irq mask */
#define   ICE1712_IRQ_TIMER		0x40	/* Timer mask */
#define   ICE1712_IRQ_MPU2		0x20	/* Secondary MIDI irq mask */
#define   ICE1712_IRQ_PROPCM		0x10	/* professional multi-track */
#define   ICE1712_IRQ_FM		0x08	/* FM/MIDI - legacy */
#define   ICE1712_IRQ_PBKDS		0x04	/* playback DS channels */
#define   ICE1712_IRQ_CONCAP		0x02	/* consumer capture */