gpu: drm: bridge: analogix: analogix_dp_reg: Remove unused function... (2f62f499) · Commits · 戴 / test

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c

+0 −88

Original line number	Diff line number	Diff line
		@@ -524,94 +524,6 @@ void analogix_dp_enable_sw_function(struct analogix_dp_device *dp)
		writel(reg, dp->reg_base + ANALOGIX_DP_FUNC_EN_1);
		}

		static int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp)
		{
		int reg;
		int retval = 0;
		int timeout_loop = 0;

		/* Enable AUX CH operation */
		reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);
		reg \|= AUX_EN;
		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_2);

		/* Is AUX CH command reply received? */
		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
		while (!(reg & RPLY_RECEIV)) {
		timeout_loop++;
		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
		dev_err(dp->dev, "AUX CH command reply failed!\n");
		return -ETIMEDOUT;
		}
		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
		usleep_range(10, 11);
		}

		/* Clear interrupt source for AUX CH command reply */
		writel(RPLY_RECEIV, dp->reg_base + ANALOGIX_DP_INT_STA);

		/* Clear interrupt source for AUX CH access error */
		reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA);
		if (reg & AUX_ERR) {
		writel(AUX_ERR, dp->reg_base + ANALOGIX_DP_INT_STA);
		return -EREMOTEIO;
		}

		/* Check AUX CH error access status */
		reg = readl(dp->reg_base + ANALOGIX_DP_AUX_CH_STA);
		if ((reg & AUX_STATUS_MASK) != 0) {
		dev_err(dp->dev, "AUX CH error happens: %d\n\n",
		reg & AUX_STATUS_MASK);
		return -EREMOTEIO;
		}

		return retval;
		}

		int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
		unsigned int reg_addr,
		unsigned char data)
		{
		u32 reg;
		int i;
		int retval;

		for (i = 0; i < 3; i++) {
		/* Clear AUX CH data buffer */
		reg = BUF_CLR;
		writel(reg, dp->reg_base + ANALOGIX_DP_BUFFER_DATA_CTL);

		/* Select DPCD device address */
		reg = AUX_ADDR_7_0(reg_addr);
		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_7_0);
		reg = AUX_ADDR_15_8(reg_addr);
		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_15_8);
		reg = AUX_ADDR_19_16(reg_addr);
		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_ADDR_19_16);

		/* Write data buffer */
		reg = (unsigned int)data;
		writel(reg, dp->reg_base + ANALOGIX_DP_BUF_DATA_0);

		/*
		* Set DisplayPort transaction and write 1 byte
		* If bit 3 is 1, DisplayPort transaction.
		* If Bit 3 is 0, I2C transaction.
		*/
		reg = AUX_TX_COMM_DP_TRANSACTION \| AUX_TX_COMM_WRITE;
		writel(reg, dp->reg_base + ANALOGIX_DP_AUX_CH_CTL_1);

		/* Start AUX transaction */
		retval = analogix_dp_start_aux_transaction(dp);
		if (retval == 0)
		break;

		dev_dbg(dp->dev, "%s: Aux Transaction fail!\n", __func__);
		}

		return retval;
		}

		void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype)
		{
		u32 reg;

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