Commit 2f103251 authored Aug 18, 2014 by Nishanth Menon Committed by Tero Kristo Aug 21, 2014

clk: ti: divider: Provide error check for incoming parameters in set_rate



Check for valid parameters in check rate. Else, we end up getting errors
like:
[    0.000000] Division by zero in kernel.
[    0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc1 #1
[    0.000000] [<c0015160>] (unwind_backtrace) from [<c0011978>] (show_stack+0x10/0x14)
[    0.000000] [<c0011978>] (show_stack) from [<c055f5f4>] (dump_stack+0x78/0x94)
[    0.000000] [<c055f5f4>] (dump_stack) from [<c02e17cc>] (Ldiv0+0x8/0x10)
[    0.000000] [<c02e17cc>] (Ldiv0) from [<c047d228>] (ti_clk_divider_set_rate+0x14/0x14c)
[    0.000000] [<c047d228>] (ti_clk_divider_set_rate) from [<c047a938>] (clk_change_rate+0x138/0x180)
[    0.000000] [<c047a938>] (clk_change_rate) from [<c047a908>] (clk_change_rate+0x108/0x180)

This occurs as part of the inital clock tree update of child clock nodes
where new_rate could be 0 for non functional clocks.

Fixes: b4761198 ("CLK: ti: add support for ti divider-clock")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

parent 7d1311b9

drivers/clk/ti/divider.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -211,11 +211,16 @@ static long ti_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
		static int ti_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
		unsigned long parent_rate)
		{
		struct clk_divider *divider = to_clk_divider(hw);
		struct clk_divider *divider;
		unsigned int div, value;
		unsigned long flags = 0;
		u32 val;

		if (!hw \|\| !rate)
		return -EINVAL;

		divider = to_clk_divider(hw);

		div = DIV_ROUND_UP(parent_rate, rate);
		value = _get_val(divider, div);

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