Commit 2f072d75 authored by Zaibo Xu's avatar Zaibo Xu Committed by Herbert Xu
Browse files

crypto: hisilicon - Add aead support on SEC2



authenc(hmac(sha1),cbc(aes)), authenc(hmac(sha256),cbc(aes)), and
authenc(hmac(sha512),cbc(aes)) support are added for SEC v2.

Signed-off-by: default avatarZaibo Xu <xuzaibo@huawei.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 473a0f96
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+7 −1
Original line number Diff line number Diff line
@@ -20,12 +20,18 @@ config CRYPTO_DEV_HISI_SEC2
	select CRYPTO_ALGAPI
	select CRYPTO_LIB_DES
	select CRYPTO_DEV_HISI_QM
	select CRYPTO_AEAD
	select CRYPTO_AUTHENC
	select CRYPTO_HMAC
	select CRYPTO_SHA1
	select CRYPTO_SHA256
	select CRYPTO_SHA512
	depends on PCI && PCI_MSI
	depends on ARM64 || (COMPILE_TEST && 64BIT)
	help
	  Support for HiSilicon SEC Engine of version 2 in crypto subsystem.
	  It provides AES, SM4, and 3DES algorithms with ECB
	  CBC, and XTS cipher mode.
	  CBC, and XTS cipher mode, and AEAD algorithms.

	  To compile this as a module, choose M here: the module
          will be called hisi_sec2.
+28 −1
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@
struct sec_alg_res {
	u8 *c_ivin;
	dma_addr_t c_ivin_dma;
	u8 *out_mac;
	dma_addr_t out_mac_dma;
};

/* Cipher request of SEC private */
@@ -26,14 +28,21 @@ struct sec_cipher_req {
	bool encrypt;
};

struct sec_aead_req {
	u8 *out_mac;
	dma_addr_t out_mac_dma;
	struct aead_request *aead_req;
};

/* SEC request of Crypto */
struct sec_req {
	struct sec_sqe sec_sqe;
	struct sec_ctx *ctx;
	struct sec_qp_ctx *qp_ctx;

	/* Cipher supported only at present */
	struct sec_cipher_req c_req;
	struct sec_aead_req aead_req;

	int err_type;
	int req_id;

@@ -60,6 +69,16 @@ struct sec_req_op {
	int (*process)(struct sec_ctx *ctx, struct sec_req *req);
};

/* SEC auth context */
struct sec_auth_ctx {
	dma_addr_t a_key_dma;
	u8 *a_key;
	u8 a_key_len;
	u8 mac_len;
	u8 a_alg;
	struct crypto_shash *hash_tfm;
};

/* SEC cipher context which cipher's relatives */
struct sec_cipher_ctx {
	u8 *c_key;
@@ -85,6 +104,11 @@ struct sec_qp_ctx {
	atomic_t pending_reqs;
};

enum sec_alg_type {
	SEC_SKCIPHER,
	SEC_AEAD
};

/* SEC Crypto TFM context which defines queue and cipher .etc relatives */
struct sec_ctx {
	struct sec_qp_ctx *qp_ctx;
@@ -102,7 +126,10 @@ struct sec_ctx {

	 /* Currrent cyclic index to select a queue for decipher */
	atomic_t dec_qcyclic;

	enum sec_alg_type alg_type;
	struct sec_cipher_ctx c_ctx;
	struct sec_auth_ctx a_ctx;
};

enum sec_endian {
+567 −22

File changed.

Preview size limit exceeded, changes collapsed.

+18 −0
Original line number Diff line number Diff line
@@ -14,6 +14,18 @@ enum sec_calg {
	SEC_CALG_SM4  = 0x3,
};

enum sec_hash_alg {
	SEC_A_HMAC_SHA1   = 0x10,
	SEC_A_HMAC_SHA256 = 0x11,
	SEC_A_HMAC_SHA512 = 0x15,
};

enum sec_mac_len {
	SEC_HMAC_SHA1_MAC   = 20,
	SEC_HMAC_SHA256_MAC = 32,
	SEC_HMAC_SHA512_MAC = 64,
};

enum sec_cmode {
	SEC_CMODE_ECB    = 0x0,
	SEC_CMODE_CBC    = 0x1,
@@ -34,6 +46,12 @@ enum sec_bd_type {
	SEC_BD_TYPE2 = 0x2,
};

enum sec_auth {
	SEC_NO_AUTH = 0x0,
	SEC_AUTH_TYPE1 = 0x1,
	SEC_AUTH_TYPE2 = 0x2,
};

enum sec_cipher_dir {
	SEC_CIPHER_ENC = 0x1,
	SEC_CIPHER_DEC = 0x2,