Commit 2f0384e5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-amd-nb-for-linus' of... 

Merge branch 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, amd_nb: Enable GART support for AMD family 0x15 CPUs
  x86, amd: Use compute unit information to determine thread siblings
  x86, amd: Extract compute unit information for AMD CPUs
  x86, amd: Add support for CPUID topology extension of AMD CPUs
  x86, nmi: Support NMI watchdog on newer AMD CPU families
  x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs
  x86, k8: Rename k8.[ch] to amd_nb.[ch] and CONFIG_K8_NB to CONFIG_AMD_NB
  x86, k8-gart: Decouple handling of garts and northbridges
  x86, cacheinfo: Fix dependency of AMD L3 CID
  x86, kvm: add new AMD SVM feature bits
  x86, cpu: Fix allowed CPUID bits for KVM guests
  x86, cpu: Update AMD CPUID feature bits
  x86, cpu: Fix renamed, not-yet-shipping AMD CPUID feature bit
  x86, AMD: Remove needless CPU family check (for L3 cache info)
  x86, tsc: Remove CPU frequency calibration on AMD
parents bc4016f4 5c80cc78

arch/x86/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -674,7 +674,7 @@ config GART_IOMMU 
	bool "GART IOMMU support" if EMBEDDED

	default y

	select SWIOTLB

	depends on X86_64 && PCI && K8_NB

	depends on X86_64 && PCI && AMD_NB

	---help---

	  Support for full DMA access of devices with 32bit memory access only

	  on systems with more than 3GB. This is usually needed for USB,
@@ -2091,7 +2091,7 @@ config OLPC_OPENFIRMWARE 


endif # X86_32



config K8_NB

config AMD_NB

	def_bool y

	depends on CPU_SUP_AMD && PCI

arch/x86/include/asm/k8.h→arch/x86/include/asm/amd_nb.h

+12 −9
Original line number Diff line number Diff line 
#ifndef _ASM_X86_K8_H

#define _ASM_X86_K8_H

#ifndef _ASM_X86_AMD_NB_H

#define _ASM_X86_AMD_NB_H



#include <linux/pci.h>
@@ -7,24 +7,27 @@ extern struct pci_device_id k8_nb_ids[]; 
struct bootnode;



extern int early_is_k8_nb(u32 value);

extern struct pci_dev **k8_northbridges;

extern int num_k8_northbridges;

extern int cache_k8_northbridges(void);

extern void k8_flush_garts(void);

extern int k8_get_nodes(struct bootnode *nodes);

extern int k8_numa_init(unsigned long start_pfn, unsigned long end_pfn);

extern int k8_scan_nodes(void);



#ifdef CONFIG_K8_NB

extern int num_k8_northbridges;

struct k8_northbridge_info {

	u16 num;

	u8 gart_supported;

	struct pci_dev **nb_misc;

};

extern struct k8_northbridge_info k8_northbridges;



#ifdef CONFIG_AMD_NB



static inline struct pci_dev *node_to_k8_nb_misc(int node)

{

	return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL;

	return (node < k8_northbridges.num) ? k8_northbridges.nb_misc[node] : NULL;

}



#else

#define num_k8_northbridges 0



static inline struct pci_dev *node_to_k8_nb_misc(int node)

{
@@ -33,4 +36,4 @@ static inline struct pci_dev *node_to_k8_nb_misc(int node) 
#endif





#endif /* _ASM_X86_K8_H */
 
#endif /* _ASM_X86_AMD_NB_H */

arch/x86/include/asm/cpufeature.h

+12 −1
Original line number Diff line number Diff line
@@ -152,10 +152,14 @@ 
#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */

#define X86_FEATURE_OSVW	(6*32+ 9) /* OS Visible Workaround */

#define X86_FEATURE_IBS		(6*32+10) /* Instruction Based Sampling */

#define X86_FEATURE_SSE5	(6*32+11) /* SSE-5 */

#define X86_FEATURE_XOP		(6*32+11) /* extended AVX instructions */

#define X86_FEATURE_SKINIT	(6*32+12) /* SKINIT/STGI instructions */

#define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */

#define X86_FEATURE_LWP		(6*32+15) /* Light Weight Profiling */

#define X86_FEATURE_FMA4	(6*32+16) /* 4 operands MAC instructions */

#define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */

#define X86_FEATURE_TBM		(6*32+21) /* trailing bit manipulations */

#define X86_FEATURE_TOPOEXT	(6*32+22) /* topology extensions CPUID leafs */



/*

 * Auxiliary flags: Linux defined - For features scattered in various
@@ -180,6 +184,13 @@ 
#define X86_FEATURE_LBRV	(8*32+ 6) /* AMD LBR Virtualization support */

#define X86_FEATURE_SVML	(8*32+ 7) /* "svm_lock" AMD SVM locking MSR */

#define X86_FEATURE_NRIPS	(8*32+ 8) /* "nrip_save" AMD SVM next_rip save */

#define X86_FEATURE_TSCRATEMSR  (8*32+ 9) /* "tsc_scale" AMD TSC scaling support */

#define X86_FEATURE_VMCBCLEAN   (8*32+10) /* "vmcb_clean" AMD VMCB clean bits support */

#define X86_FEATURE_FLUSHBYASID (8*32+11) /* AMD flush-by-ASID support */

#define X86_FEATURE_DECODEASSISTS (8*32+12) /* AMD Decode Assists support */

#define X86_FEATURE_PAUSEFILTER (8*32+13) /* AMD filtered pause intercept */

#define X86_FEATURE_PFTHRESHOLD (8*32+14) /* AMD pause filter threshold */





/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */

#define X86_FEATURE_FSGSBASE	(9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/

arch/x86/include/asm/processor.h

+2 −0
Original line number Diff line number Diff line
@@ -110,6 +110,8 @@ struct cpuinfo_x86 { 
	u16			phys_proc_id;

	/* Core id: */

	u16			cpu_core_id;

	/* Compute unit id */

	u8			compute_unit_id;

	/* Index into per_cpu list: */

	u16			cpu_index;

#endif

arch/x86/kernel/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 
obj-$(CONFIG_HPET_TIMER) 	+= hpet.o

obj-$(CONFIG_APB_TIMER)		+= apb_timer.o



obj-$(CONFIG_K8_NB)		+= k8.o

obj-$(CONFIG_AMD_NB)		+= amd_nb.o

obj-$(CONFIG_DEBUG_RODATA_TEST)	+= test_rodata.o

obj-$(CONFIG_DEBUG_NX_TEST)	+= test_nx.o

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