drm/amdgpu:insert TMZ_BEGIN (2ea6ab27) · Commits · 戴 / test

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+8 −6

Original line number	Diff line number	Diff line
		@@ -3764,6 +3764,12 @@ static void gfx_v9_0_ring_emit_de_meta(struct amdgpu_ring *ring)
		amdgpu_ring_write_multiple(ring, (void *)&de_payload, sizeof(de_payload) >> 2);
		}

		static void gfx_v9_0_ring_emit_tmz(struct amdgpu_ring *ring, bool start)
		{
		amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));
		amdgpu_ring_write(ring, FRAME_CMD(start ? 0 : 1)); /* frame_end */
		}

		static void gfx_v9_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags)
		{
		uint32_t dw2 = 0;
		@@ -3771,6 +3777,8 @@ static void gfx_v9_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags)
		if (amdgpu_sriov_vf(ring->adev))
		gfx_v9_0_ring_emit_ce_meta(ring);

		gfx_v9_0_ring_emit_tmz(ring, true);

		dw2 \|= 0x80000000; /* set load_enable otherwise this package is just NOPs */
		if (flags & AMDGPU_HAVE_CTX_SWITCH) {
		/* set load_global_config & load_global_uconfig */
		@@ -3821,12 +3829,6 @@ static void gfx_v9_0_ring_emit_patch_cond_exec(struct amdgpu_ring *ring, unsigne
		ring->ring[offset] = (ring->ring_size>>2) - offset + cur;
		}

		static void gfx_v9_0_ring_emit_tmz(struct amdgpu_ring *ring, bool start)
		{
		amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));
		amdgpu_ring_write(ring, FRAME_CMD(start ? 0 : 1)); /* frame_end */
		}

		static void gfx_v9_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg)
		{
		struct amdgpu_device *adev = ring->adev;