Commit 2e923b02 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 

Pull networking fixes from David Miller:

 1) Include fixes for netrom and dsa (Fabian Frederick and Florian
    Fainelli)

 2) Fix FIXED_PHY support in stmmac, from Giuseppe CAVALLARO.

 3) Several SKB use after free fixes (vxlan, openvswitch, vxlan,
    ip_tunnel, fou), from Li ROngQing.

 4) fec driver PTP support fixes from Luwei Zhou and Nimrod Andy.

 5) Use after free in virtio_net, from Michael S Tsirkin.

 6) Fix flow mask handling for megaflows in openvswitch, from Pravin B
    Shelar.

 7) ISDN gigaset and capi bug fixes from Tilman Schmidt.

 8) Fix route leak in ip_send_unicast_reply(), from Vasily Averin.

 9) Fix two eBPF JIT bugs on x86, from Alexei Starovoitov.

10) TCP_SKB_CB() reorganization caused a few regressions, fixed by Cong
    Wang and Eric Dumazet.

11) Don't overwrite end of SKB when parsing malformed sctp ASCONF
    chunks, from Daniel Borkmann.

12) Don't call sock_kfree_s() with NULL pointers, this function also has
    the side effect of adjusting the socket memory usage.  From Cong Wang.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (90 commits)
  bna: fix skb->truesize underestimation
  net: dsa: add includes for ethtool and phy_fixed definitions
  openvswitch: Set flow-key members.
  netrom: use linux/uaccess.h
  dsa: Fix conversion from host device to mii bus
  tipc: fix bug in bundled buffer reception
  ipv6: introduce tcp_v6_iif()
  sfc: add support for skb->xmit_more
  r8152: return -EBUSY for runtime suspend
  ipv4: fix a potential use after free in fou.c
  ipv4: fix a potential use after free in ip_tunnel_core.c
  hyperv: Add handling of IP header with option field in netvsc_set_hash()
  openvswitch: Create right mask with disabled megaflows
  vxlan: fix a free after use
  openvswitch: fix a use after free
  ipv4: dst_entry leak in ip_send_unicast_reply()
  ipv4: clean up cookie_v4_check()
  ipv4: share tcp_v4_save_options() with cookie_v4_check()
  ipv4: call __ip_options_echo() in cookie_v4_check()
  atm: simplify lanai.c by using module_pci_driver
  ...
parents ffd8221b f2d9da1a

Documentation/devicetree/bindings/net/sti-dwmac.txt

+49 −42
Original line number Diff line number Diff line 
STMicroelectronics SoC DWMAC glue layer controller



This file documents differences between the core properties in

Documentation/devicetree/bindings/net/stmmac.txt

and what is needed on STi platforms to program the stmmac glue logic.



The device node has following properties.



Required properties:

 - compatible	: Can be "st,stih415-dwmac", "st,stih416-dwmac" or

   "st,stid127-dwmac".

 - compatible	: Can be "st,stih415-dwmac", "st,stih416-dwmac",

   "st,stih407-dwmac", "st,stid127-dwmac".

 - reg : Offset of the glue configuration register map in system

   configuration regmap pointed by st,syscon property and size.



 - reg-names	: Should be "sti-ethconf".



 - st,syscon : Should be phandle to system configuration node which

   encompases this glue registers.

 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control

   register available on STiH407 SoC.

 - sti-ethconf: this is the gmac glue logic register to enable the GMAC,

   select among the different modes and program the clk retiming.

 - pinctrl-0: pin-control for all the MII mode supported.



 - st,tx-retime-src: On STi Parts for Giga bit speeds, 125Mhz clocks can be

   wired up in from different sources. One via TXCLK pin and other via CLK_125

   pin. This wiring is totally board dependent. However the retiming glue

   logic should be configured accordingly. Possible values for this property



	   "txclk" - if 125Mhz clock is wired up via txclk line.

	   "clk_125" - if 125Mhz clock is wired up via clk_125 line.



   This property is only valid for Giga bit setup( GMII, RGMII), and it is

   un-used for non-giga bit (MII and RMII) setups. Also note that internal

   clockgen can not generate stable 125Mhz clock.



 - st,ext-phyclk: This boolean property indicates who is generating the clock

  for tx and rx. This property is only valid for RMII case where the clock can

  be generated from the MAC or PHY.



 - clock-names: should be "sti-ethclk".

 - clocks: Should point to ethernet clockgen which can generate phyclk.



Optional properties:

 - resets : phandle pointing to the system reset controller with correct

   reset line index for ethernet reset.

 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or

   MAC can generate it.

 - st,tx-retime-src: This specifies which clk is wired up to the mac for

   retimeing tx lines. This is totally board dependent and can take one of the

   posssible values from "txclk", "clk_125" or "clkgen".

   If not passed, the internal clock will be used by default.

 - sti-ethclk: this is the phy clock.

 - sti-clkconf: this is an extra sysconfig register, available in new SoCs,

   to program the clk retiming.

 - st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g.

   STiH407.



Example:



ethernet0: dwmac@fe810000 {

ethernet0: dwmac@9630000 {

	device_type = "network";

	compatible	= "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";

	reg 		= <0xfe810000 0x8000>, <0x8bc 0x4>;

	status = "disabled";

	compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";

	reg = <0x9630000 0x8000>, <0x80 0x4>;

	reg-names = "stmmaceth", "sti-ethconf";

	interrupts	= <0 133 0>, <0 134 0>, <0 135 0>;

	interrupt-names	= "macirq", "eth_wake_irq", "eth_lpi";

	phy-mode	= "mii";



	st,syscon	= <&syscfg_rear>;

	st,syscon = <&syscfg_sbc_reg>;

	st,gmac_en;

	resets = <&softreset STIH407_ETH1_SOFTRESET>;

	reset-names = "stmmaceth";



	interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,

		     <GIC_SPI 99 IRQ_TYPE_NONE>,

		     <GIC_SPI 100 IRQ_TYPE_NONE>;

	interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";



	snps,pbl = <32>;

	snps,mixed-burst;



	resets		= <&softreset STIH416_ETH0_SOFTRESET>;

	reset-names	= "stmmaceth";

	pinctrl-0	= <&pinctrl_mii0>;

	pinctrl-names = "default";

	clocks		= <&CLK_S_GMAC0_PHY>;

	clock-names	= "stmmaceth";

	pinctrl-0 = <&pinctrl_rgmii1>;



	clock-names = "stmmaceth", "sti-ethclk";

	clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>,

		 <&CLK_S_C0_FLEXGEN CLK_ETH_PHY>;

};

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -564,7 +564,7 @@ L: linux-alpha@vger.kernel.org 
F:	arch/alpha/



ALTERA TRIPLE SPEED ETHERNET DRIVER

M:	Vince Bridgers <vbridgers2013@gmail.com>

M:	Vince Bridgers <vbridger@opensource.altera.com>

L:	netdev@vger.kernel.org

L:	nios2-dev@lists.rocketboards.org (moderated for non-subscribers)

S:	Maintained

arch/arm64/boot/dts/apm-mustang.dts

+4 −0
Original line number Diff line number Diff line
@@ -41,6 +41,10 @@ 
	status = "ok";

};



&sgenet0 {

	status = "ok";

};



&xgenet {

	status = "ok";

};

arch/arm64/boot/dts/apm-storm.dtsi

+24 −0
Original line number Diff line number Diff line
@@ -176,6 +176,16 @@ 
				clock-output-names = "menetclk";

			};



			sge0clk: sge0clk@1f21c000 {

				compatible = "apm,xgene-device-clock";

				#clock-cells = <1>;

				clocks = <&socplldiv2 0>;

				reg = <0x0 0x1f21c000 0x0 0x1000>;

				reg-names = "csr-reg";

				csr-mask = <0x3>;

				clock-output-names = "sge0clk";

			};



			xge0clk: xge0clk@1f61c000 {

				compatible = "apm,xgene-device-clock";

				#clock-cells = <1>;
@@ -611,6 +621,20 @@ 
			};

		};



		sgenet0: ethernet@1f210000 {

			compatible = "apm,xgene-enet";

			status = "disabled";

			reg = <0x0 0x1f210000 0x0 0x10000>,

			      <0x0 0x1f200000 0x0 0X10000>,

			      <0x0 0x1B000000 0x0 0X20000>;

			reg-names = "enet_csr", "ring_csr", "ring_cmd";

			interrupts = <0x0 0xA0 0x4>;

			dma-coherent;

			clocks = <&sge0clk 0>;

			local-mac-address = [00 00 00 00 00 00];

			phy-connection-type = "sgmii";

		};



		xgenet: ethernet@1f610000 {

			compatible = "apm,xgene-enet";

			status = "disabled";

arch/x86/net/bpf_jit_comp.c

+19 −6
Original line number Diff line number Diff line
@@ -182,12 +182,17 @@ struct jit_context { 
	bool seen_ld_abs;

};



/* maximum number of bytes emitted while JITing one eBPF insn */

#define BPF_MAX_INSN_SIZE	128

#define BPF_INSN_SAFETY		64



static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,

		  int oldproglen, struct jit_context *ctx)

{

	struct bpf_insn *insn = bpf_prog->insnsi;

	int insn_cnt = bpf_prog->len;

	u8 temp[64];

	bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);

	u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];

	int i;

	int proglen = 0;

	u8 *prog = temp;
@@ -225,7 +230,7 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, 
	EMIT2(0x31, 0xc0); /* xor eax, eax */

	EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */



	if (ctx->seen_ld_abs) {

	if (seen_ld_abs) {

		/* r9d : skb->len - skb->data_len (headlen)

		 * r10 : skb->data

		 */
@@ -685,7 +690,7 @@ xadd: if (is_imm8(insn->off)) 
		case BPF_JMP | BPF_CALL:

			func = (u8 *) __bpf_call_base + imm32;

			jmp_offset = func - (image + addrs[i]);

			if (ctx->seen_ld_abs) {

			if (seen_ld_abs) {

				EMIT2(0x41, 0x52); /* push %r10 */

				EMIT2(0x41, 0x51); /* push %r9 */

				/* need to adjust jmp offset, since
@@ -699,7 +704,7 @@ xadd: if (is_imm8(insn->off)) 
				return -EINVAL;

			}

			EMIT1_off32(0xE8, jmp_offset);

			if (ctx->seen_ld_abs) {

			if (seen_ld_abs) {

				EMIT2(0x41, 0x59); /* pop %r9 */

				EMIT2(0x41, 0x5A); /* pop %r10 */

			}
@@ -804,7 +809,8 @@ emit_jmp: 
			goto common_load;

		case BPF_LD | BPF_ABS | BPF_W:

			func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);

common_load:		ctx->seen_ld_abs = true;

common_load:

			ctx->seen_ld_abs = seen_ld_abs = true;

			jmp_offset = func - (image + addrs[i]);

			if (!func || !is_simm32(jmp_offset)) {

				pr_err("unsupported bpf func %d addr %p image %p\n",
@@ -878,6 +884,11 @@ common_load: ctx->seen_ld_abs = true; 
		}



		ilen = prog - temp;

		if (ilen > BPF_MAX_INSN_SIZE) {

			pr_err("bpf_jit_compile fatal insn size error\n");

			return -EFAULT;

		}



		if (image) {

			if (unlikely(proglen + ilen > oldproglen)) {

				pr_err("bpf_jit_compile fatal error\n");
@@ -934,9 +945,11 @@ void bpf_int_jit_compile(struct bpf_prog *prog) 
			goto out;

		}

		if (image) {

			if (proglen != oldproglen)

			if (proglen != oldproglen) {

				pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",

				       proglen, oldproglen);

				goto out;

			}

			break;

		}

		if (proglen == oldproglen) {

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