x86/devicetree: Fix the ioapic interrupt type table (2e730cb5) · Commits · 戴 / test

The ioapic interrupt type table is wrong as it assumes that polarity in IO/APIC context means active high when set. But the IO/APIC polarity is working the other way round. This works because the ordering of the entries is consistent with the device tree and the type information is not used by the IO/APIC interrupt chip. The whole trigger and polarity business of IO/APIC is misleading and the corresponding constants which are defined as 0/1 are not used consistently and are going to be removed. Rename the type table members to 'is_level' and 'active_low' and adjust the type information for consistency sake. No functional change. Signed-off-by:

Thomas Gleixner <tglx@linutronix.de> Signed-off-by:

David Woodhouse <dwmw@amazon.co.uk> Signed-off-by:

Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20201024213535.443185-5-dwmw2@infradead.org

arch/x86/kernel/devicetree.c

+15 −15

Original line number	Diff line number	Diff line
		@@ -184,31 +184,31 @@ static unsigned int ioapic_id;

		struct of_ioapic_type {
		u32 out_type;
		u32 trigger;
		u32 polarity;
		u32 is_level;
		u32 active_low;
		};

		static struct of_ioapic_type of_ioapic_type[] =
		{
		{
		.out_type = IRQ_TYPE_EDGE_RISING,
		.trigger = IOAPIC_EDGE,
		.polarity = 1,
		.out_type = IRQ_TYPE_EDGE_FALLING,
		.is_level = 0,
		.active_low = 1,
		},
		{
		.out_type = IRQ_TYPE_LEVEL_LOW,
		.trigger = IOAPIC_LEVEL,
		.polarity = 0,
		.out_type = IRQ_TYPE_LEVEL_HIGH,
		.is_level = 1,
		.active_low = 0,
		},
		{
		.out_type = IRQ_TYPE_LEVEL_HIGH,
		.trigger = IOAPIC_LEVEL,
		.polarity = 1,
		.out_type = IRQ_TYPE_LEVEL_LOW,
		.is_level = 1,
		.active_low = 1,
		},
		{
		.out_type = IRQ_TYPE_EDGE_FALLING,
		.trigger = IOAPIC_EDGE,
		.polarity = 0,
		.out_type = IRQ_TYPE_EDGE_RISING,
		.is_level = 0,
		.active_low = 0,
		},
		};

		@@ -228,7 +228,7 @@ static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
		return -EINVAL;

		it = &of_ioapic_type[type_index];
		ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity);
		ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->is_level, it->active_low);
		tmp.devid = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
		tmp.ioapic.pin = fwspec->param[0];

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