drm/v3d: Don't bother flushing L1TD at job start. (2e6dc3bd) · Commits · 戴 / test

This is the write combiner for TMU writes. You're supposed to flush that at job end if you had dirtied any cachelines. Flushing it at job start then doesn't make any sense. Signed-off-by:

Eric Anholt <eric@anholt.net> Fixes: ("drm/v3d: Introduce a new DRM driver for Broadcom V3D V3.x+") Reviewed-by:

Dave Emett <david.emett@broadcom.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181203222438.25417-3-eric@anholt.net

drivers/gpu/drm/v3d/v3d_gem.c

+0 −12

Original line number	Diff line number	Diff line
		@@ -139,22 +139,10 @@ v3d_invalidate_l2(struct v3d_dev *v3d, int core)
		V3D_L2CACTL_L2CENA);
		}

		static void
		v3d_invalidate_l1td(struct v3d_dev *v3d, int core)
		{
		V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
		if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
		V3D_L2TCACTL_L2TFLS), 100)) {
		DRM_ERROR("Timeout waiting for L1T write combiner flush\n");
		}
		}

		/* Invalidates texture L2 cachelines */
		static void
		v3d_flush_l2t(struct v3d_dev *v3d, int core)
		{
		v3d_invalidate_l1td(v3d, core);

		V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
		V3D_L2TCACTL_L2TFLS \|
		V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));

Admin message