Commit 2e3df204 authored by Adam Ford's avatar Adam Ford Committed by Mauro Carvalho Chehab
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media: ov5640: Fix check for PLL1 exceeding max allowed rate



The variable _rate is by ov5640_compute_sys_clk() which returns
zero if the PLL exceeds 1GHz.  Unfortunately, the check to see
if the max PLL1 output is checking 'rate' and not '_rate' and
'rate' does not ever appear to be 0.

This patch changes the check against the returned value of
'_rate' to determine if the PLL1 output exceeds 1GHz.

Fixes: aa288248 ("media: ov5640: Adjust the clock based on the expected rate")
Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 5554c80e
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+1 −1
Original line number Diff line number Diff line
@@ -885,7 +885,7 @@ static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
			 * We have reached the maximum allowed PLL1 output,
			 * increase sysdiv.
			 */
			if (!rate)
			if (!_rate)
				break;

			/*