Commit 2e15001e authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/32s: Reorganise DSI handler. 



The part decidated to handling hash_page() is fully unneeded for
processors not having real hash pages like the 603.

Lets enlarge the content of the feature fixup, and provide
an alternative which jumps directly instead of getting NIPs.

Also, in preparation of VMAP stacks, the end of DSI handler has moved
to later in the code as it won't fit anymore once VMAP stacks
are there.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c31b22c91af8b011d0a4fd9e52ad6afb4b593f71.1576916812.git.christophe.leroy@c-s.fr
parent 99b22916

arch/powerpc/kernel/head_32.S

+17 −14
Original line number Diff line number Diff line
@@ -295,24 +295,20 @@ __secondary_hold_acknowledge: 
	DO_KVM  0x300

DataAccess:

	EXCEPTION_PROLOG

	mfspr	r10,SPRN_DSISR

	stw	r10,_DSISR(r11)

	get_and_save_dar_dsisr_on_stack	r4, r5, r11

BEGIN_MMU_FTR_SECTION

#ifdef CONFIG_PPC_KUAP

	andis.	r0,r10,(DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h

	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH | DSISR_PROTFAULT)@h

#else

	andis.	r0,r10,(DSISR_BAD_FAULT_32S|DSISR_DABRMATCH)@h

	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH)@h

#endif

	bne	1f			/* if not, try to put a PTE */

	mfspr	r4,SPRN_DAR		/* into the hash table */

	rlwinm	r3,r10,32-15,21,21	/* DSISR_STORE -> _PAGE_RW */

BEGIN_MMU_FTR_SECTION

	bne	handle_page_fault_tramp_2	/* if not, try to put a PTE */

	rlwinm	r3, r5, 32 - 15, 21, 21		/* DSISR_STORE -> _PAGE_RW */

	bl	hash_page

END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)

1:	lwz	r5,_DSISR(r11)		/* get DSISR value */

	mfspr	r4,SPRN_DAR

	stw	r4, _DAR(r11)

	EXC_XFER_LITE(0x300, handle_page_fault)



	b	handle_page_fault_tramp_1

FTR_SECTION_ELSE

	b	handle_page_fault_tramp_2

ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)



/* Instruction access exception. */

	. = 0x400
@@ -642,6 +638,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_NEED_DTLB_SW_LRU) 


	. = 0x3000



handle_page_fault_tramp_1:

	lwz	r4, _DAR(r11)

	lwz	r5, _DSISR(r11)

	/* fall through */

handle_page_fault_tramp_2:

	EXC_XFER_LITE(0x300, handle_page_fault)



AltiVecUnavailable:

	EXCEPTION_PROLOG

#ifdef CONFIG_ALTIVEC

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