Commit 2e08a4bb authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Daniel Lezcano
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clocksource/drivers/tegra: Add verbose definition for 1MHz constant



Convert all 1MHz literals to a verbose constant for better readability.

Suggested-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
parent 7c708fda
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+7 −5
Original line number Diff line number Diff line
@@ -46,6 +46,8 @@
#define TIMER1_IRQ_IDX		0
#define TIMER10_IRQ_IDX		10

#define TIMER_1MHz		1000000

static u32 usec_config;
static void __iomem *timer_reg_base;

@@ -160,7 +162,7 @@ static unsigned long tegra_delay_timer_read_counter_long(void)

static struct delay_timer tegra_delay_timer = {
	.read_current_timer = tegra_delay_timer_read_counter_long,
	.freq = 1000000,
	.freq = TIMER_1MHz,
};
#endif

@@ -226,7 +228,7 @@ static inline unsigned long tegra_rate_for_timer(struct timer_of *to,
	 * parent clock.
	 */
	if (tegra20)
		return 1000000;
		return TIMER_1MHz;

	return timer_of_rate(to);
}
@@ -315,11 +317,11 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20,
		}
	}

	sched_clock_register(tegra_read_sched_clock, 32, 1000000);
	sched_clock_register(tegra_read_sched_clock, 32, TIMER_1MHz);

	ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
				    "timer_us", 1000000,
				    300, 32, clocksource_mmio_readl_up);
				    "timer_us", TIMER_1MHz, 300, 32,
				    clocksource_mmio_readl_up);
	if (ret)
		pr_err("failed to register clocksource: %d\n", ret);