Commit 2e04dbce authored by Anshuman Gupta's avatar Anshuman Gupta Committed by Imre Deak
Browse files

drm/i915/icl: Remove DDI IO power domain from PG3 power domains 



The DDI-IO power wells (PWR_WELL_CTL_DDI) are backing
the IO/PHY functionality, which doesn't need the PG3
power power well. Accordingly fixing up the list of
PG3 power domains.

v2: Removed "DDI E/F IO"power domain as well [Imre]

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarAnshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190811081908.9114-1-anshuman.gupta@intel.com
parent a5f978c3

drivers/gpu/drm/i915/display/intel_display_power.c

+0 −5
Original line number Diff line number Diff line
@@ -2482,15 +2482,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, 
	BIT_ULL(POWER_DOMAIN_TRANSCODER_C) |		\

	BIT_ULL(POWER_DOMAIN_PIPE_B_PANEL_FITTER) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_B_IO) |		\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_C_IO) |		\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) |		\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_E_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_E_IO) |		\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) |	\

	BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) |		\

	BIT_ULL(POWER_DOMAIN_AUX_B) |			\

	BIT_ULL(POWER_DOMAIN_AUX_C) |			\

	BIT_ULL(POWER_DOMAIN_AUX_D) |			\

CRA Git | Maintained and supported by SUSTech CRA and CCSE