net: ethernet: enc28j60: add device tree support

* Microchip ENC28J60

This is a standalone 10 MBit ethernet controller with SPI interface.

For each device connected to a SPI bus, define a child node within

the SPI master node.

Required properties:

- compatible: Should be "microchip,enc28j60"

- reg: Specify the SPI chip select the ENC28J60 is wired to

- interrupt-parent: Specify the phandle of the source interrupt, see interrupt

                    binding documentation for details. Usually this is the GPIO bank

                    the interrupt line is wired to.

- interrupts: Specify the interrupt index within the interrupt controller (referred

              to above in interrupt-parent) and interrupt type. The ENC28J60 natively

              generates falling edge interrupts, however, additional board logic

              might invert the signal.

- pinctrl-names: List of assigned state names, see pinctrl binding documentation.

- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,

             see also generic and your platform specific pinctrl binding

             documentation.

Optional properties:

- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.

  According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,

  board designs may need to limit this value.

- local-mac-address: See ethernet.txt in the same directory.

Example (for NXP i.MX28 with pin control stuff for GPIO irq):

        ssp2: ssp@80014000 {

                compatible = "fsl,imx28-spi";

                pinctrl-names = "default";

                pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;

                status = "okay";

                enc28j60: ethernet@0 {

                        compatible = "microchip,enc28j60";

                        pinctrl-names = "default";

                        pinctrl-0 = <&enc28j60_pins>;

                        reg = <0>;

                        interrupt-parent = <&gpio3>;

                        interrupts = <3 IRQ_TYPE_EDGE_FALLING>;

                        spi-max-frequency = <12000000>;

                };

        };

        pinctrl@80018000 {

                enc28j60_pins: enc28j60_pins@0 {

                        reg = <0>;

                        fsl,pinmux-ids = <

                                MX28_PAD_AUART0_RTS__GPIO_3_3    /* Interrupt */

                        >;

                        fsl,drive-strength = <MXS_DRIVE_4mA>;

                        fsl,voltage = <MXS_VOLTAGE_HIGH>;

                        fsl,pull-up = <MXS_PULL_DISABLE>;

                };

        };

#include <linux/skbuff.h>

#include <linux/delay.h>

#include <linux/spi/spi.h>

#include <linux/of_net.h>

#include "enc28j60_hw.h"

#define DRV_NAME	"enc28j60"

#define DRV_VERSION	"1.01"

#define DRV_VERSION	"1.02"

#define SPI_OPLEN	1

{

	struct net_device *dev;

	struct enc28j60_net *priv;

	const void *macaddr;

	int ret = 0;

	if (netif_msg_drv(&debug))

		ret = -EIO;

		goto error_irq;

	}

	macaddr = of_get_mac_address(spi->dev.of_node);

	if (macaddr)

		ether_addr_copy(dev->dev_addr, macaddr);

	else

		eth_hw_addr_random(dev);

	enc28j60_set_hw_macaddr(dev);

	return 0;

}

static const struct of_device_id enc28j60_dt_ids[] = {

	{ .compatible = "microchip,enc28j60" },

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);

static struct spi_driver enc28j60_driver = {

	.driver = {

		.name = DRV_NAME,

		.of_match_table = enc28j60_dt_ids,

	 },

	.probe = enc28j60_probe,

	.remove = enc28j60_remove,