Commit 2d38c80d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull kvm fixes from Paolo Bonzini:
 "ARM:
   - selftest fix
   - force PTE mapping on device pages provided via VFIO
   - fix detection of cacheable mapping at S2
   - fallback to PMD/PTE mappings for composite huge pages
   - fix accounting of Stage-2 PGD allocation
   - fix AArch32 handling of some of the debug registers
   - simplify host HYP entry
   - fix stray pointer conversion on nVHE TLB invalidation
   - fix initialization of the nVHE code
   - simplify handling of capabilities exposed to HYP
   - nuke VCPUs caught using a forbidden AArch32 EL0

  x86:
   - new nested virtualization selftest
   - miscellaneous fixes
   - make W=1 fixes
   - reserve new CPUID bit in the KVM leaves"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: vmx: remove unused variable
  KVM: selftests: Don't require THP to run tests
  KVM: VMX: eVMCS: make evmcs_sanitize_exec_ctrls() work again
  KVM: selftests: test behavior of unmapped L2 APIC-access address
  KVM: x86: Fix NULL dereference at kvm_msr_ignored_check()
  KVM: x86: replace static const variables with macros
  KVM: arm64: Handle Asymmetric AArch32 systems
  arm64: cpufeature: upgrade hyp caps to final
  arm64: cpufeature: reorder cpus_have_{const, final}_cap()
  KVM: arm64: Factor out is_{vhe,nvhe}_hyp_code()
  KVM: arm64: Force PTE mapping on fault resulting in a device mapping
  KVM: arm64: Use fallback mapping sizes for contiguous huge page sizes
  KVM: arm64: Fix masks in stage2_pte_cacheable()
  KVM: arm64: Fix AArch32 handling of DBGD{CCINT,SCRext} and DBGVCR
  KVM: arm64: Allocate stage-2 pgd pages with GFP_KERNEL_ACCOUNT
  KVM: arm64: Drop useless PAN setting on host EL1 to EL2 transition
  KVM: arm64: Remove leftover kern_hyp_va() in nVHE TLB invalidation
  KVM: arm64: Don't corrupt tpidr_el2 on failed HVC call
  x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID
parents c2dc4c07 9478dec3

Documentation/virt/kvm/cpuid.rst

+4 −0
Original line number Diff line number Diff line
@@ -92,6 +92,10 @@ KVM_FEATURE_ASYNC_PF_INT 14 guest checks this feature bit 
                                               async pf acknowledgment msr

                                               0x4b564d07.



KVM_FEATURE_MSI_EXT_DEST_ID        15          guest checks this feature bit

                                               before using extended destination

                                               ID bits in MSI address bits 11-5.



KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24          host will warn if no guest-side

                                               per-cpu warps are expected in

                                               kvmclock

arch/arm64/include/asm/cpufeature.h

+31 −9
Original line number Diff line number Diff line
@@ -375,6 +375,23 @@ cpucap_multi_entry_cap_matches(const struct arm64_cpu_capabilities *entry, 
	return false;

}



static __always_inline bool is_vhe_hyp_code(void)

{

	/* Only defined for code run in VHE hyp context */

	return __is_defined(__KVM_VHE_HYPERVISOR__);

}



static __always_inline bool is_nvhe_hyp_code(void)

{

	/* Only defined for code run in NVHE hyp context */

	return __is_defined(__KVM_NVHE_HYPERVISOR__);

}



static __always_inline bool is_hyp_code(void)

{

	return is_vhe_hyp_code() || is_nvhe_hyp_code();

}



extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);

extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS];

extern struct static_key_false arm64_const_caps_ready;
@@ -428,35 +445,40 @@ static __always_inline bool __cpus_have_const_cap(int num) 
}



/*

 * Test for a capability, possibly with a runtime check.

 * Test for a capability without a runtime check.

 *

 * Before capabilities are finalized, this behaves as cpus_have_cap().

 * Before capabilities are finalized, this will BUG().

 * After capabilities are finalized, this is patched to avoid a runtime check.

 *

 * @num must be a compile-time constant.

 */

static __always_inline bool cpus_have_const_cap(int num)

static __always_inline bool cpus_have_final_cap(int num)

{

	if (system_capabilities_finalized())

		return __cpus_have_const_cap(num);

	else

		return cpus_have_cap(num);

		BUG();

}



/*

 * Test for a capability without a runtime check.

 * Test for a capability, possibly with a runtime check for non-hyp code.

 *

 * Before capabilities are finalized, this will BUG().

 * For hyp code, this behaves the same as cpus_have_final_cap().

 *

 * For non-hyp code:

 * Before capabilities are finalized, this behaves as cpus_have_cap().

 * After capabilities are finalized, this is patched to avoid a runtime check.

 *

 * @num must be a compile-time constant.

 */

static __always_inline bool cpus_have_final_cap(int num)

static __always_inline bool cpus_have_const_cap(int num)

{

	if (system_capabilities_finalized())

	if (is_hyp_code())

		return cpus_have_final_cap(num);

	else if (system_capabilities_finalized())

		return __cpus_have_const_cap(num);

	else

		BUG();

		return cpus_have_cap(num);

}



static inline void cpus_set_cap(unsigned int num)

arch/arm64/include/asm/kvm_host.h

+1 −0
Original line number Diff line number Diff line
@@ -239,6 +239,7 @@ enum vcpu_sysreg { 
#define cp14_DBGWCR0	(DBGWCR0_EL1 * 2)

#define cp14_DBGWVR0	(DBGWVR0_EL1 * 2)

#define cp14_DBGDCCINT	(MDCCINT_EL1 * 2)

#define cp14_DBGVCR	(DBGVCR32_EL2 * 2)



#define NR_COPRO_REGS	(NR_SYS_REGS * 2)

arch/arm64/include/asm/virt.h

+4 −5
Original line number Diff line number Diff line
@@ -86,13 +86,12 @@ static inline bool is_kernel_in_hyp_mode(void) 
static __always_inline bool has_vhe(void)

{

	/*

	 * The following macros are defined for code specic to VHE/nVHE.

	 * If has_vhe() is inlined into those compilation units, it can

	 * be determined statically. Otherwise fall back to caps.

	 * Code only run in VHE/NVHE hyp context can assume VHE is present or

	 * absent. Otherwise fall back to caps.

	 */

	if (__is_defined(__KVM_VHE_HYPERVISOR__))

	if (is_vhe_hyp_code())

		return true;

	else if (__is_defined(__KVM_NVHE_HYPERVISOR__))

	else if (is_nvhe_hyp_code())

		return false;

	else

		return cpus_have_final_cap(ARM64_HAS_VIRT_HOST_EXTN);

arch/arm64/kernel/image-vars.h

+0 −1
Original line number Diff line number Diff line
@@ -87,7 +87,6 @@ KVM_NVHE_ALIAS(__icache_flags); 
/* Kernel symbols needed for cpus_have_final/const_caps checks. */

KVM_NVHE_ALIAS(arm64_const_caps_ready);

KVM_NVHE_ALIAS(cpu_hwcap_keys);

KVM_NVHE_ALIAS(cpu_hwcaps);



/* Static keys which are set if a vGIC trap should be handled in hyp. */

KVM_NVHE_ALIAS(vgic_v2_cpuif_trap);

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