Commit 2d387995 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915: Add psr_safest_params 



This parameter is meant to be used when PSR issues are found as some
issues in the past was due wrong values set in VBT so this would be
a quick and easy way to ask users or for us to check if the issue is
due VBT values.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Reviewed-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200520212756.354623-1-jose.souza@intel.com
parent 24d2fc3d

drivers/gpu/drm/i915/display/intel_psr.c

+28 −9
Original line number Diff line number Diff line
@@ -426,6 +426,12 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp) 
	if (INTEL_GEN(dev_priv) >= 11)

		val |= EDP_PSR_TP4_TIME_0US;



	if (i915_modparams.psr_safest_params) {

		val |= EDP_PSR_TP1_TIME_2500us;

		val |= EDP_PSR_TP2_TP3_TIME_2500us;

		goto check_tp3_sel;

	}



	if (dev_priv->vbt.psr.tp1_wakeup_time_us == 0)

		val |= EDP_PSR_TP1_TIME_0us;

	else if (dev_priv->vbt.psr.tp1_wakeup_time_us <= 100)
@@ -444,6 +450,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp) 
	else

		val |= EDP_PSR_TP2_TP3_TIME_2500us;



check_tp3_sel:

	if (intel_dp_source_supports_hbr2(intel_dp) &&

	    drm_dp_tps3_supported(intel_dp->dpcd))

		val |= EDP_PSR_TP1_TP3_SEL;
@@ -495,18 +502,13 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp) 
	intel_de_write(dev_priv, EDP_PSR_CTL(dev_priv->psr.transcoder), val);

}



static void hsw_activate_psr2(struct intel_dp *intel_dp)

static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)

{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u32 val;



	val = psr_compute_idle_frames(intel_dp) << EDP_PSR2_IDLE_FRAME_SHIFT;



	val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;

	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

		val |= EDP_Y_COORDINATE_ENABLE;

	u32 val = 0;



	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);

	if (i915_modparams.psr_safest_params)

		return EDP_PSR2_TP2_TIME_2500us;



	if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&

	    dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50)
@@ -518,6 +520,23 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) 
	else

		val |= EDP_PSR2_TP2_TIME_2500us;



	return val;

}



static void hsw_activate_psr2(struct intel_dp *intel_dp)

{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	u32 val;



	val = psr_compute_idle_frames(intel_dp) << EDP_PSR2_IDLE_FRAME_SHIFT;



	val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;

	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

		val |= EDP_Y_COORDINATE_ENABLE;



	val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);

	val |= intel_psr2_get_tp_time(intel_dp);



	/*

	 * PSR2 HW is incorrectly using EDP_PSR_TP1_TP3_SEL and BSpec is

	 * recommending keep this bit unset while PSR2 is enabled.

drivers/gpu/drm/i915/i915_params.c

+5 −0
Original line number Diff line number Diff line
@@ -97,6 +97,11 @@ i915_param_named_unsafe(enable_psr, int, 0400, 
	"(0=disabled, 1=enabled) "

	"Default: -1 (use per-chip default)");



i915_param_named(psr_safest_params, bool, 0400,

	"Replace PSR VBT parameters by the safest and not optimal ones. This "

	"is helpfull to detect if PSR issues are related to bad values set in "

	" VBT. (0=use VBT paramters, 1=use safest parameters)");



i915_param_named_unsafe(force_probe, charp, 0400,

	"Force probe the driver for specified devices. "

	"See CONFIG_DRM_I915_FORCE_PROBE for details.");

drivers/gpu/drm/i915/i915_params.h

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ struct drm_printer; 
	param(int, enable_dc, -1, 0400) \

	param(int, enable_fbc, -1, 0600) \

	param(int, enable_psr, -1, 0600) \

	param(bool, psr_safest_params, false, 0600) \

	param(int, disable_power_well, -1, 0400) \

	param(int, enable_ips, 1, 0600) \

	param(int, invert_brightness, 0, 0600) \

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