pwm: tegra: Add support for Tegra194 (2d0c08fc) · Commits · 戴 / test

Tegra194 has multiple PWM controllers with each having only one output. Also the maxmimum frequency is higher than earlier SoCs. Add support for Tegra194 and specify the number of PWM outputs and maximum supported frequency using device tree match data. Signed-off-by:

Sandipan Patra <spatra@nvidia.com> Acked-by:

Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by:

Laxman Dewangan <ldewangan@nvidia.com> Acked-by:

Rob Herring <robh@kernel.org> Acked-by:

Jon Hunter <jonathanh@nvidia.com> Signed-off-by:

Thierry Reding <thierry.reding@gmail.com>

Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -9,6 +9,7 @@ Required properties:
		- "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
		- "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
		- "nvidia,tegra186-pwm": for Tegra186
		- "nvidia,tegra194-pwm": for Tegra194
		- reg: physical base address and length of the controller's registers
		- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
		the cells format.

drivers/pwm/pwm-tegra.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -282,9 +282,15 @@ static const struct tegra_pwm_soc tegra186_pwm_soc = {
		.max_frequency = 102000000UL,
		};

		static const struct tegra_pwm_soc tegra194_pwm_soc = {
		.num_channels = 1,
		.max_frequency = 408000000UL,
		};

		static const struct of_device_id tegra_pwm_of_match[] = {
		{ .compatible = "nvidia,tegra20-pwm", .data = &tegra20_pwm_soc },
		{ .compatible = "nvidia,tegra186-pwm", .data = &tegra186_pwm_soc },
		{ .compatible = "nvidia,tegra194-pwm", .data = &tegra194_pwm_soc },
		{ }
		};
		MODULE_DEVICE_TABLE(of, tegra_pwm_of_match);

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