Commit 2d046308 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/64s/exception: move and tidy EXCEPTION_PROLOG_2 variants



- Re-name the macros to _REAL and _VIRT suffixes rather than no and
  _RELON suffix.

- Move the macro definitions together in the file.

- Move RELOCATABLE ifdef inside the _VIRT macro.

Further consolidation between variants does not buy much here.

No generated code change.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent bd7b6d13
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+42 −45
Original line number Diff line number Diff line
@@ -174,8 +174,33 @@
	ori	reg,reg,(ABS_ADDR(label))@l;				\
	addis	reg,reg,(ABS_ADDR(label))@h

.macro EXCEPTION_PROLOG_2_REAL label, hsrr, set_ri
	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */
	.if ! \set_ri
	xori	r10,r10,MSR_RI		/* Clear MSR_RI */
	.endif
	.if \hsrr
	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
	.else
	mfspr	r11,SPRN_SRR0		/* save SRR0 */
	.endif
	LOAD_HANDLER(r12, \label\())
	.if \hsrr
	mtspr	SPRN_HSRR0,r12
	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
	mtspr	SPRN_HSRR1,r10
	HRFI_TO_KERNEL
	.else
	mtspr	SPRN_SRR0,r12
	mfspr	r12,SPRN_SRR1		/* and SRR1 */
	mtspr	SPRN_SRR1,r10
	RFI_TO_KERNEL
	.endif
	b	.	/* prevent speculative execution */
.endm

.macro EXCEPTION_PROLOG_2_VIRT label, hsrr
#ifdef CONFIG_RELOCATABLE
.macro EXCEPTION_PROLOG_2_RELON label, hsrr
	.if \hsrr
	mfspr	r11,SPRN_HSRR0	/* save HSRR0 */
	.else
@@ -191,10 +216,7 @@
	li	r10,MSR_RI
	mtmsrd 	r10,1		/* Set RI (EE=0) */
	bctr
.endm
#else
/* If not relocatable, we can jump directly -- and save messing with LR */
.macro EXCEPTION_PROLOG_2_RELON label, hsrr
	.if \hsrr
	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
@@ -205,19 +227,19 @@
	li	r10,MSR_RI
	mtmsrd 	r10,1			/* Set RI (EE=0) */
	b	\label
.endm
#endif
.endm

/*
 * As EXCEPTION_PROLOG(), except we've already got relocation on so no need to
 * rfid. Save LR in case we're CONFIG_RELOCATABLE, in which case
 * EXCEPTION_PROLOG_2_RELON will be using LR.
 * rfid. Save CTR in case we're CONFIG_RELOCATABLE, in which case
 * EXCEPTION_PROLOG_2_VIRT will be using CTR.
 */
#define EXCEPTION_RELON_PROLOG(area, label, hsrr, extra, vec)		\
	SET_SCRATCH0(r13);		/* save r13 */			\
	EXCEPTION_PROLOG_0(area);					\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_PROLOG_2_RELON label, hsrr
	EXCEPTION_PROLOG_2_VIRT label, hsrr

/* Exception register prefixes */
#define EXC_HV		1
@@ -323,36 +345,11 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define EXCEPTION_PROLOG_1(area, extra, vec)				\
	_EXCEPTION_PROLOG_1(area, extra, vec)

.macro EXCEPTION_PROLOG_2 label, hsrr, set_ri
	ld	r10,PACAKMSR(r13)	/* get MSR value for kernel */
	.if ! \set_ri
	xori	r10,r10,MSR_RI		/* Clear MSR_RI */
	.endif
	.if \hsrr
	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
	.else
	mfspr	r11,SPRN_SRR0		/* save SRR0 */
	.endif
	LOAD_HANDLER(r12,\label\())
	.if \hsrr
	mtspr	SPRN_HSRR0,r12
	mfspr	r12,SPRN_HSRR1		/* and HSRR1 */
	mtspr	SPRN_HSRR1,r10
	HRFI_TO_KERNEL
	.else
	mtspr	SPRN_SRR0,r12
	mfspr	r12,SPRN_SRR1		/* and SRR1 */
	mtspr	SPRN_SRR1,r10
	RFI_TO_KERNEL
	.endif
	b	.	/* prevent speculative execution */
.endm

#define EXCEPTION_PROLOG(area, label, h, extra, vec)			\
	SET_SCRATCH0(r13);		/* save r13 */			\
	EXCEPTION_PROLOG_0(area);					\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_PROLOG_2 label, h, 1
	EXCEPTION_PROLOG_2_REAL label, h, 1

#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
/*
@@ -421,7 +418,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
#define EXCEPTION_PROLOG_NORI(area, label, h, extra, vec)		\
	EXCEPTION_PROLOG_0(area);					\
	EXCEPTION_PROLOG_1(area, extra, vec);				\
	EXCEPTION_PROLOG_2 label, h, 0
	EXCEPTION_PROLOG_2_REAL label, h, 0

#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
.macro KVMTEST hsrr, n
@@ -578,14 +575,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)

#define STD_EXCEPTION_OOL(vec, label)				\
	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec);	\
	EXCEPTION_PROLOG_2 label, EXC_STD, 1
	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1

#define STD_EXCEPTION_HV(loc, vec, label)			\
	EXCEPTION_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)

#define STD_EXCEPTION_HV_OOL(vec, label)			\
	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
	EXCEPTION_PROLOG_2 label, EXC_HV, 1
	EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1

#define STD_RELON_EXCEPTION(loc, vec, label)		\
	/* No guest interrupts come through here */	\
@@ -593,14 +590,14 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)

#define STD_RELON_EXCEPTION_OOL(vec, label)			\
	EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec);		\
	EXCEPTION_PROLOG_2_RELON label, EXC_STD
	EXCEPTION_PROLOG_2_VIRT label, EXC_STD

#define STD_RELON_EXCEPTION_HV(loc, vec, label)		\
	EXCEPTION_RELON_PROLOG(PACA_EXGEN, label, EXC_HV, KVMTEST_HV, vec)

#define STD_RELON_EXCEPTION_HV_OOL(vec, label)			\
	EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec);	\
	EXCEPTION_PROLOG_2_RELON label, EXC_HV
	EXCEPTION_PROLOG_2_VIRT label, EXC_HV

.macro SOFTEN_TEST hsrr, vec, bitmask
	lbz	r10, PACAIRQSOFTMASK(r13)
@@ -649,41 +646,41 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
	SET_SCRATCH0(r13);    /* save r13 */				\
	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
	EXCEPTION_PROLOG_2 label, h, 1
	EXCEPTION_PROLOG_2_REAL label, h, 1

#define MASKABLE_EXCEPTION(vec, label, bitmask)				\
	__MASKABLE_EXCEPTION(vec, label, EXC_STD, SOFTEN_TEST_PR, bitmask)

#define MASKABLE_EXCEPTION_OOL(vec, label, bitmask)			\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec, bitmask);\
	EXCEPTION_PROLOG_2 label, EXC_STD, 1
	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1

#define MASKABLE_EXCEPTION_HV(vec, label, bitmask)			\
	__MASKABLE_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)

#define MASKABLE_EXCEPTION_HV_OOL(vec, label, bitmask)			\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
	EXCEPTION_PROLOG_2 label, EXC_HV, 1
	EXCEPTION_PROLOG_2_REAL label, EXC_HV, 1

#define __MASKABLE_RELON_EXCEPTION(vec, label, h, extra, bitmask)	\
	SET_SCRATCH0(r13);    /* save r13 */				\
	EXCEPTION_PROLOG_0(PACA_EXGEN);					\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec, bitmask);	\
	EXCEPTION_PROLOG_2_RELON label, h
	EXCEPTION_PROLOG_2_VIRT label, h

#define MASKABLE_RELON_EXCEPTION(vec, label, bitmask)			\
	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_STD, SOFTEN_NOTEST_PR, bitmask)

#define MASKABLE_RELON_EXCEPTION_OOL(vec, label, bitmask)		\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
	EXCEPTION_PROLOG_2 label, EXC_STD, 1
	EXCEPTION_PROLOG_2_REAL label, EXC_STD, 1

#define MASKABLE_RELON_EXCEPTION_HV(vec, label, bitmask)		\
	__MASKABLE_RELON_EXCEPTION(vec, label, EXC_HV, SOFTEN_TEST_HV, bitmask)

#define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label, bitmask)		\
	MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec, bitmask);\
	EXCEPTION_PROLOG_2_RELON label, EXC_HV
	EXCEPTION_PROLOG_2_VIRT label, EXC_HV

/*
 * Our exception common code can be passed various "additions"
+9 −9
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ machine_check_pSeries_0:
	 * nested machine check corrupts it. machine_check_common enables
	 * MSR_RI.
	 */
	EXCEPTION_PROLOG_2 machine_check_common, EXC_STD, 0
	EXCEPTION_PROLOG_2_REAL machine_check_common, EXC_STD, 0

TRAMP_KVM_SKIP(PACA_EXMC, 0x200)

@@ -598,7 +598,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x300)
	mfspr	r11,SPRN_DSISR
	std	r10,PACA_EXGEN+EX_DAR(r13)
	stw	r11,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_2 data_access_common, EXC_STD, 1
EXCEPTION_PROLOG_2_REAL data_access_common, EXC_STD, 1

EXC_VIRT_BEGIN(data_access, 0x4300, 0x80)
SET_SCRATCH0(r13)		/* save r13 */
@@ -608,7 +608,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x300)
	mfspr	r11,SPRN_DSISR
	std	r10,PACA_EXGEN+EX_DAR(r13)
	stw	r11,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_2_RELON data_access_common, EXC_STD
EXCEPTION_PROLOG_2_VIRT data_access_common, EXC_STD
EXC_VIRT_END(data_access, 0x4300, 0x80)

TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
@@ -645,7 +645,7 @@ TRAMP_REAL_BEGIN(tramp_real_data_access_slb)
EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
	mfspr	r10,SPRN_DAR
	std	r10,PACA_EXSLB+EX_DAR(r13)
EXCEPTION_PROLOG_2 data_access_slb_common, EXC_STD, 1
EXCEPTION_PROLOG_2_REAL data_access_slb_common, EXC_STD, 1

EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x80)
SET_SCRATCH0(r13)		/* save r13 */
@@ -653,7 +653,7 @@ EXCEPTION_PROLOG_0(PACA_EXSLB)
EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
	mfspr	r10,SPRN_DAR
	std	r10,PACA_EXSLB+EX_DAR(r13)
EXCEPTION_PROLOG_2_RELON data_access_slb_common, EXC_STD
EXCEPTION_PROLOG_2_VIRT data_access_slb_common, EXC_STD
EXC_VIRT_END(data_access_slb, 0x4380, 0x80)

TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
@@ -774,7 +774,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x600)
	mfspr	r11,SPRN_DSISR
	std	r10,PACA_EXGEN+EX_DAR(r13)
	stw	r11,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_2 alignment_common, EXC_STD, 1
EXCEPTION_PROLOG_2_REAL alignment_common, EXC_STD, 1
EXC_REAL_END(alignment, 0x600, 0x100)

EXC_VIRT_BEGIN(alignment, 0x4600, 0x100)
@@ -785,7 +785,7 @@ EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x600)
	mfspr	r11,SPRN_DSISR
	std	r10,PACA_EXGEN+EX_DAR(r13)
	stw	r11,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_2_RELON alignment_common, EXC_STD
EXCEPTION_PROLOG_2_VIRT alignment_common, EXC_STD
EXC_VIRT_END(alignment, 0x4600, 0x100)

TRAMP_KVM(PACA_EXGEN, 0x600)
@@ -1320,7 +1320,7 @@ EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x100)
#endif

	KVMTEST_HV(0x1500)
	EXCEPTION_PROLOG_2 denorm_common, EXC_HV, 1
	EXCEPTION_PROLOG_2_REAL denorm_common, EXC_HV, 1
EXC_REAL_END(denorm_exception_hv, 0x1500, 0x100)

#ifdef CONFIG_PPC_DENORMALISATION
@@ -1442,7 +1442,7 @@ EXC_VIRT_NONE(0x5800, 0x100)
	std	r12,PACA_EXGEN+EX_R12(r13);		\
	GET_SCRATCH0(r10);				\
	std	r10,PACA_EXGEN+EX_R13(r13);		\
	EXCEPTION_PROLOG_2 soft_nmi_common, _H, 1
	EXCEPTION_PROLOG_2_REAL soft_nmi_common, _H, 1

/*
 * Branch to soft_nmi_interrupt using the emergency stack. The emergency