Commit 2cfab8d7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux 

* 'drm-intel-fixes' of git://people.freedesktop.org/~keithp/linux:
  drm/i915/dp: Dither down to 6bpc if it makes the mode fit
  drm/i915: enable semaphores on per-device defaults
  drm/i915: don't set unpin_work if vblank_get fails
  drm/i915: By default, enable RC6 on IVB and SNB when reasonable
  iommu: Export intel_iommu_enabled to signal when iommu is in use
  drm/i915/sdvo: Include LVDS panels for the IS_DIGITAL check
  drm/i915: prevent division by zero when asking for chipset power
  drm/i915: add PCH info to i915_capabilities
  drm/i915: set the right SDVO transcoder for CPT
  drm/i915: no-lvds quirk for ASUS AT5NM10T-I
  drm/i915: Treat pre-gen4 backlight duty cycle value consistently
  drm/i915: Hook up Ivybridge eDP
  drm/i915: add multi-threaded forcewake support
parents 5885b9b3 3b5c78a3

drivers/gpu/drm/i915/i915_debugfs.c

+1 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ static int i915_capabilities(struct seq_file *m, void *data) 
	const struct intel_device_info *info = INTEL_INFO(dev);



	seq_printf(m, "gen: %d\n", info->gen);

	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));

#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))

	B(is_mobile);

	B(is_i85x);

drivers/gpu/drm/i915/i915_dma.c

+10 −0
Original line number Diff line number Diff line
@@ -1454,6 +1454,14 @@ unsigned long i915_chipset_val(struct drm_i915_private *dev_priv) 


	diff1 = now - dev_priv->last_time1;



	/* Prevent division-by-zero if we are asking too fast.

	 * Also, we don't get interesting results if we are polling

	 * faster than once in 10ms, so just return the saved value

	 * in such cases.

	 */

	if (diff1 <= 10)

		return dev_priv->chipset_power;



	count1 = I915_READ(DMIEC);

	count2 = I915_READ(DDREC);

	count3 = I915_READ(CSIEC);
@@ -1484,6 +1492,8 @@ unsigned long i915_chipset_val(struct drm_i915_private *dev_priv) 
	dev_priv->last_count1 = total_count;

	dev_priv->last_time1 = now;



	dev_priv->chipset_power = ret;



	return ret;

}

drivers/gpu/drm/i915/i915_drv.c

+33 −10
Original line number Diff line number Diff line
@@ -58,15 +58,15 @@ module_param_named(powersave, i915_powersave, int, 0600); 
MODULE_PARM_DESC(powersave,

		"Enable powersavings, fbc, downclocking, etc. (default: true)");



unsigned int i915_semaphores __read_mostly = 0;

int i915_semaphores __read_mostly = -1;

module_param_named(semaphores, i915_semaphores, int, 0600);

MODULE_PARM_DESC(semaphores,

		"Use semaphores for inter-ring sync (default: false)");

		"Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");



unsigned int i915_enable_rc6 __read_mostly = 0;

int i915_enable_rc6 __read_mostly = -1;

module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600);

MODULE_PARM_DESC(i915_enable_rc6,

		"Enable power-saving render C-state 6 (default: true)");

		"Enable power-saving render C-state 6 (default: -1 (use per-chip default)");



int i915_enable_fbc __read_mostly = -1;

module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
@@ -328,7 +328,7 @@ void intel_detect_pch(struct drm_device *dev) 
	}

}



static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)

void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)

{

	int count;
@@ -344,6 +344,22 @@ static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) 
		udelay(10);

}



void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)

{

	int count;



	count = 0;

	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))

		udelay(10);



	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 1);

	POSTING_READ(FORCEWAKE_MT);



	count = 0;

	while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)

		udelay(10);

}



/*

 * Generally this is called implicitly by the register read function. However,

 * if some sequence requires the GT to not power down then this function should
@@ -356,15 +372,21 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv) 


	/* Forcewake is atomic in case we get in here without the lock */

	if (atomic_add_return(1, &dev_priv->forcewake_count) == 1)

		__gen6_gt_force_wake_get(dev_priv);

		dev_priv->display.force_wake_get(dev_priv);

}



static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)

void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)

{

	I915_WRITE_NOTRACE(FORCEWAKE, 0);

	POSTING_READ(FORCEWAKE);

}



void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)

{

	I915_WRITE_NOTRACE(FORCEWAKE_MT, (1<<16) | 0);

	POSTING_READ(FORCEWAKE_MT);

}



/*

 * see gen6_gt_force_wake_get()

 */
@@ -373,7 +395,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv) 
	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));



	if (atomic_dec_and_test(&dev_priv->forcewake_count))

		__gen6_gt_force_wake_put(dev_priv);

		dev_priv->display.force_wake_put(dev_priv);

}



void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
@@ -904,7 +926,8 @@ MODULE_LICENSE("GPL and additional rights"); 
#define NEEDS_FORCE_WAKE(dev_priv, reg) \

	(((dev_priv)->info->gen >= 6) && \

	 ((reg) < 0x40000) &&		 \

	((reg) != FORCEWAKE))

	 ((reg) != FORCEWAKE) &&	 \

	 ((reg) != ECOBUS))



#define __i915_read(x, y) \

u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \

drivers/gpu/drm/i915/i915_drv.h

+14 −4
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ struct opregion_header; 
struct opregion_acpi;

struct opregion_swsci;

struct opregion_asle;

struct drm_i915_private;



struct intel_opregion {

	struct opregion_header *header;
@@ -221,6 +222,8 @@ struct drm_i915_display_funcs { 
			  struct drm_i915_gem_object *obj);

	int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,

			    int x, int y);

	void (*force_wake_get)(struct drm_i915_private *dev_priv);

	void (*force_wake_put)(struct drm_i915_private *dev_priv);

	/* clock updates for mode set */

	/* cursor updates */

	/* render clock increase/decrease */
@@ -710,6 +713,7 @@ typedef struct drm_i915_private { 


	u64 last_count1;

	unsigned long last_time1;

	unsigned long chipset_power;

	u64 last_count2;

	struct timespec last_time2;

	unsigned long gfx_power;
@@ -998,11 +1002,11 @@ extern int i915_max_ioctl; 
extern unsigned int i915_fbpercrtc __always_unused;

extern int i915_panel_ignore_lid __read_mostly;

extern unsigned int i915_powersave __read_mostly;

extern unsigned int i915_semaphores __read_mostly;

extern int i915_semaphores __read_mostly;

extern unsigned int i915_lvds_downclock __read_mostly;

extern int i915_panel_use_ssc __read_mostly;

extern int i915_vbt_sdvo_panel_type __read_mostly;

extern unsigned int i915_enable_rc6 __read_mostly;

extern int i915_enable_rc6 __read_mostly;

extern int i915_enable_fbc __read_mostly;

extern bool i915_enable_hangcheck __read_mostly;
@@ -1308,6 +1312,11 @@ extern void gen6_set_rps(struct drm_device *dev, u8 val); 
extern void intel_detect_pch(struct drm_device *dev);

extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);



extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);

extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);

extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);

extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);



/* overlay */

#ifdef CONFIG_DEBUG_FS

extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
@@ -1353,7 +1362,8 @@ void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv); 
#define NEEDS_FORCE_WAKE(dev_priv, reg) \

	(((dev_priv)->info->gen >= 6) && \

	 ((reg) < 0x40000) &&		 \

	((reg) != FORCEWAKE))

	 ((reg) != FORCEWAKE) &&	 \

	 ((reg) != ECOBUS))



#define __i915_read(x, y) \

	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+18 −1
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#include "i915_drv.h"

#include "i915_trace.h"

#include "intel_drv.h"

#include <linux/dma_remapping.h>



struct change_domains {

	uint32_t invalidate_domains;
@@ -746,6 +747,22 @@ i915_gem_execbuffer_flush(struct drm_device *dev, 
	return 0;

}



static bool

intel_enable_semaphores(struct drm_device *dev)

{

	if (INTEL_INFO(dev)->gen < 6)

		return 0;



	if (i915_semaphores >= 0)

		return i915_semaphores;



	/* Enable semaphores on SNB when IO remapping is off */

	if (INTEL_INFO(dev)->gen == 6)

		return !intel_iommu_enabled;



	return 1;

}



static int

i915_gem_execbuffer_sync_rings(struct drm_i915_gem_object *obj,

			       struct intel_ring_buffer *to)
@@ -758,7 +775,7 @@ i915_gem_execbuffer_sync_rings(struct drm_i915_gem_object *obj, 
		return 0;



	/* XXX gpu semaphores are implicated in various hard hangs on SNB */

	if (INTEL_INFO(obj->base.dev)->gen < 6 || !i915_semaphores)

	if (!intel_enable_semaphores(obj->base.dev))

		return i915_gem_object_wait_rendering(obj);



	idx = intel_ring_sync_index(from, to);

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