x86-64/Xen: eliminate W+X mappings (2cc42bac) · Commits · 戴 / test

A few thousand such pages are usually left around due to the re-use of L1 tables having been provided by the hypervisor (Dom0) or tool stack (DomU). Set NX in the direct map variant, which needs to be done in L2 due to the dual use of the re-used L1s. For x86_configure_nx() to actually do what it is supposed to do, call get_cpu_cap() first. This was broken by commit ("x86, mm: Clean up and simplify NX enablement") when switching away from the direct EFER read. Signed-off-by:

Jan Beulich <jbeulich@suse.com> Reviewed-by:

Juergen Gross <jgross@suse.com> Signed-off-by:

Boris Ostrovsky <boris.ostrovsky@oracle.com>

arch/x86/xen/enlighten_pv.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -87,6 +87,8 @@
		#include "multicalls.h"
		#include "pmu.h"

		#include "../kernel/cpu/cpu.h" /* get_cpu_cap() */

		void *xen_initial_gdt;

		static int xen_cpu_up_prepare_pv(unsigned int cpu);
		@@ -1249,6 +1251,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
		__userpte_alloc_gfp &= ~__GFP_HIGHMEM;

		/* Work out if we support NX */
		get_cpu_cap(&boot_cpu_data);
		x86_configure_nx();

		/* Get mfn list */

arch/x86/xen/mmu_pv.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -1916,6 +1916,18 @@ void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
		/* Graft it onto L4[511][510] */
		copy_page(level2_kernel_pgt, l2);

		/*
		* Zap execute permission from the ident map. Due to the sharing of
		* L1 entries we need to do this in the L2.
		*/
		if (__supported_pte_mask & _PAGE_NX) {
		for (i = 0; i < PTRS_PER_PMD; ++i) {
		if (pmd_none(level2_ident_pgt[i]))
		continue;
		level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
		}
		}

		/* Copy the initial P->M table mappings if necessary. */
		i = pgd_index(xen_start_info->mfn_list);
		if (i && i < pgd_index(__START_KERNEL_map))

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