crypto: hisilicon/zip - fix some coding styles (2ca73193) · Commits · 戴 / test

drivers/crypto/hisilicon/zip/zip_crypto.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -38,8 +38,10 @@
		#define HZIP_SGL_SGE_NR 10

		static const u8 zlib_head[HZIP_ZLIB_HEAD_SIZE] = {0x78, 0x9c};
		static const u8 gzip_head[HZIP_GZIP_HEAD_SIZE] = {0x1f, 0x8b, 0x08, 0x0, 0x0,
		0x0, 0x0, 0x0, 0x0, 0x03};
		static const u8 gzip_head[HZIP_GZIP_HEAD_SIZE] = {
		0x1f, 0x8b, 0x08, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x03
		};

		enum hisi_zip_alg_type {
		HZIP_ALG_TYPE_COMP = 0,
		HZIP_ALG_TYPE_DECOMP = 1,
		@@ -359,7 +361,6 @@ static void hisi_zip_acomp_cb(struct hisi_qp qp, void data)

		atomic64_inc(&dfx->recv_cnt);
		status = sqe->dw3 & HZIP_BD_STATUS_M;

		if (status != 0 && status != HZIP_NC_ERR) {
		dev_err(dev, "%scompress fail in qp%u: %u, output: %u\n",
		(qp->alg_type == 0) ? "" : "de", qp->qp_id, status,
		@@ -520,8 +521,7 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
		struct hisi_acc_sgl_pool *pool = qp_ctx->sgl_pool;
		struct hisi_zip_dfx *dfx = &qp_ctx->zip_dev->dfx;
		struct hisi_zip_sqe zip_sqe;
		dma_addr_t input;
		dma_addr_t output;
		dma_addr_t input, output;
		int ret;

		if (!a_req->src \|\| !a_req->slen \|\| !a_req->dst \|\| !a_req->dlen)
		@@ -540,9 +540,9 @@ static int hisi_zip_do_work(struct hisi_zip_req *req,
		(req->req_id << 1) + 1,
		&output);
		if (IS_ERR(req->hw_dst)) {
		dev_err(dev, "failed to map the dst buffer to hw slg (%ld)!\n",
		PTR_ERR(req->hw_dst));
		ret = PTR_ERR(req->hw_dst);
		dev_err(dev, "failed to map the dst buffer to hw slg (%d)!\n",
		ret);
		goto err_unmap_input;
		}
		req->dma_dst = output;

+4 −12

Original line number	Diff line number	Diff line
		@@ -258,6 +258,7 @@ static int hisi_zip_set_user_domain_and_cache(struct hisi_qm *qm)
		/* qm cache */
		writel(AXI_M_CFG, base + QM_AXI_M_CFG);
		writel(AXI_M_CFG_ENABLE, base + QM_AXI_M_CFG_ENABLE);

		/* disable FLR triggered by BME(bus master enable) */
		writel(PEH_AXUSER_CFG, base + QM_PEH_AXUSER_CFG);
		writel(PEH_AXUSER_CFG_ENABLE, base + QM_PEH_AXUSER_CFG_ENABLE);
		@@ -487,7 +488,6 @@ static const struct file_operations ctrl_debug_fops = {
		.write = hisi_zip_ctrl_debug_write,
		};


		static int zip_debugfs_atomic64_set(void *data, u64 val)
		{
		if (val)
		@@ -640,9 +640,6 @@ static void hisi_zip_log_hw_error(struct hisi_qm *qm, u32 err_sts)
		dev_err(dev, "hisi-zip multi ecc sram num=0x%x\n",
		((err_val >>
		HZIP_SRAM_ECC_ERR_NUM_SHIFT) & 0xFF));
		dev_err(dev, "hisi-zip multi ecc sram addr=0x%x\n",
		(err_val >>
		HZIP_SRAM_ECC_ERR_ADDR_SHIFT));
		}
		}
		err++;
		@@ -902,15 +899,10 @@ static int __init hisi_zip_init(void)

		ret = pci_register_driver(&hisi_zip_pci_driver);
		if (ret < 0) {
		hisi_zip_unregister_debugfs();
		pr_err("Failed to register pci driver.\n");
		goto err_pci;
		}

		return 0;

		err_pci:
		hisi_zip_unregister_debugfs();

		return ret;
		}