Commit 2c949ce3 authored Mar 27, 2017 by Kishon Vijay Abraham I Committed by Bjorn Helgaas Apr 28, 2017

ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP



The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be
set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC
mode. However in EP mode, the host system is not able to access the
MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

parent f60b15b8

arch/arm/mach-omap2/clockdomains7xx_data.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -524,7 +524,7 @@ static struct clockdomain pcie_7xx_clkdm = {
		.dep_bit = DRA7XX_PCIE_STATDEP_SHIFT,
		.wkdep_srcs = pcie_wkup_sleep_deps,
		.sleepdep_srcs = pcie_wkup_sleep_deps,
		.flags = CLKDM_CAN_HWSUP_SWSUP,
		.flags = CLKDM_CAN_SWSUP,
		};

		static struct clockdomain atl_7xx_clkdm = {

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