dt-bindings: net: phy: Add support for AT803X

# SPDX-License-Identifier: GPL-2.0+

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/qca,ar803x.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Atheros AR803x PHY

maintainers:

  - Andrew Lunn <andrew@lunn.ch>

  - Florian Fainelli <f.fainelli@gmail.com>

  - Heiner Kallweit <hkallweit1@gmail.com>

description: |

  Bindings for Qualcomm Atheros AR803x PHYs

allOf:

  - $ref: ethernet-phy.yaml#

properties:

  qca,clk-out-frequency:

    description: Clock output frequency in Hertz.

    allOf:

      - $ref: /schemas/types.yaml#/definitions/uint32

      - enum: [ 25000000, 50000000, 62500000, 125000000 ]

  qca,clk-out-strength:

    description: Clock output driver strength.

    allOf:

      - $ref: /schemas/types.yaml#/definitions/uint32

      - enum: [ 0, 1, 2 ]

  qca,keep-pll-enabled:

    description: |

      If set, keep the PLL enabled even if there is no link. Useful if you

      want to use the clock output without an ethernet link.

      Only supported on the AR8031.

    type: boolean

  vddio-supply:

    description: |

      RGMII I/O voltage regulator (see regulator/regulator.yaml).

      The PHY supports RGMII I/O voltages of 1.5V, 1.8V and 2.5V. You can

      either connect this to the vddio-regulator (1.5V / 1.8V) or the

      vddh-regulator (2.5V).

      Only supported on the AR8031.

  vddio-regulator:

    type: object

    description:

      Initial data for the VDDIO regulator. Set this to 1.5V or 1.8V.

    allOf:

      - $ref: /schemas/regulator/regulator.yaml

  vddh-regulator:

    type: object

    description:

      Dummy subnode to model the external connection of the PHY VDDH

      regulator to VDDIO.

    allOf:

      - $ref: /schemas/regulator/regulator.yaml

examples:

  - |

    #include <dt-bindings/net/qca-ar803x.h>

    ethernet {

        #address-cells = <1>;

        #size-cells = <0>;

        phy-mode = "rgmii-id";

        ethernet-phy@0 {

            reg = <0>;

            qca,clk-out-frequency = <125000000>;

            qca,clk-out-strength = <AR803X_STRENGTH_FULL>;

            vddio-supply = <&vddio>;

            vddio: vddio-regulator {

                regulator-min-microvolt = <1800000>;

                regulator-max-microvolt = <1800000>;

            };

        };

    };

  - |

    #include <dt-bindings/net/qca-ar803x.h>

    ethernet {

        #address-cells = <1>;

        #size-cells = <0>;

        phy-mode = "rgmii-id";

        ethernet-phy@0 {

            reg = <0>;

            qca,clk-out-frequency = <50000000>;

            qca,keep-pll-enabled;

            vddio-supply = <&vddh>;

            vddh: vddh-regulator {

            };

        };

    };

F:	Documentation/ABI/testing/sysfs-class-net-phydev

F:	Documentation/devicetree/bindings/net/ethernet-phy.yaml

F:	Documentation/devicetree/bindings/net/mdio*

F:	Documentation/devicetree/bindings/net/qca,ar803x.yaml

F:	Documentation/networking/phy.rst

F:	drivers/net/phy/

F:	drivers/of/of_mdio.c

F:	drivers/of/of_net.c

F:	include/dt-bindings/net/qca-ar803x.h

F:	include/linux/*mdio*.h

F:	include/linux/of_net.h

F:	include/linux/phy.h

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Device Tree constants for the Qualcomm Atheros AR803x PHYs

 */

#ifndef _DT_BINDINGS_QCA_AR803X_H

#define _DT_BINDINGS_QCA_AR803X_H

#define AR803X_STRENGTH_FULL		0

#define AR803X_STRENGTH_HALF		1

#define AR803X_STRENGTH_QUARTER		2

#endif