Commit 2c2ab5af authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by David S. Miller
Browse files

sh_eth: rename sh_eth_cpu_data::hw_checksum



Commit 62e04b7e ("sh_eth: rename 'sh_eth_cpu_data::hw_crc'") renamed
the field to 'hw_checksum' for the Ether DMAC "intelligent checksum",
however some Ether MACs implement a simpler checksumming scheme, so that
name now seems misleading. Rename that field to 'csmr' as the "intelligent
checksum" is always controlled by the CSMR register.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cc733578
Loading
Loading
Loading
Loading
+7 −7
Original line number Diff line number Diff line
@@ -555,7 +555,7 @@ static int sh_eth_soft_reset_gether(struct net_device *ndev)
	sh_eth_write(ndev, 0, RDFFR);

	/* Reset HW CRC register */
	if (mdp->cd->hw_checksum)
	if (mdp->cd->csmr)
		sh_eth_write(ndev, 0, CSMR);

	/* Select MII mode */
@@ -619,7 +619,7 @@ static struct sh_eth_cpu_data r7s72100_data = {
	.no_trimd	= 1,
	.no_ade		= 1,
	.xdfar_rw	= 1,
	.hw_checksum	= 1,
	.csmr		= 1,
	.tsu		= 1,
	.no_tx_cntrs	= 1,
};
@@ -668,7 +668,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
	.no_trimd	= 1,
	.no_ade		= 1,
	.xdfar_rw	= 1,
	.hw_checksum	= 1,
	.csmr		= 1,
	.tsu		= 1,
	.select_mii	= 1,
	.magic		= 1,
@@ -793,7 +793,7 @@ static struct sh_eth_cpu_data r8a77980_data = {
	.no_trimd	= 1,
	.no_ade		= 1,
	.xdfar_rw	= 1,
	.hw_checksum	= 1,
	.csmr		= 1,
	.select_mii	= 1,
	.magic		= 1,
	.cexcr		= 1,
@@ -1045,7 +1045,7 @@ static struct sh_eth_cpu_data sh7734_data = {
	.no_ade		= 1,
	.xdfar_rw	= 1,
	.tsu		= 1,
	.hw_checksum	= 1,
	.csmr		= 1,
	.select_mii	= 1,
	.magic		= 1,
	.cexcr		= 1,
@@ -1633,7 +1633,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
		 * the RFS bits are from bit 25 to bit 16. So, the
		 * driver needs right shifting by 16.
		 */
		if (mdp->cd->hw_checksum)
		if (mdp->cd->csmr)
			desc_status >>= 16;

		skb = mdp->rx_skbuff[entry];
@@ -2173,7 +2173,7 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
	add_reg(MAFCR);
	if (cd->rtrate)
		add_reg(RTRATE);
	if (cd->hw_checksum)
	if (cd->csmr)
		add_reg(CSMR);
	if (cd->select_mii)
		add_reg(RMII_MII);
+1 −1
Original line number Diff line number Diff line
@@ -499,7 +499,7 @@ struct sh_eth_cpu_data {
	unsigned no_ade:1;	/* E-DMAC DOES NOT have ADE bit in EESR */
	unsigned no_xdfar:1;	/* E-DMAC DOES NOT have RDFAR/TDFAR */
	unsigned xdfar_rw:1;	/* E-DMAC has writeable RDFAR/TDFAR */
	unsigned hw_checksum:1;	/* E-DMAC has CSMR */
	unsigned csmr:1;	/* E-DMAC has CSMR */
	unsigned select_mii:1;	/* EtherC has RMII_MII (MII select register) */
	unsigned rmiimode:1;	/* EtherC has RMIIMODE register */
	unsigned rtrate:1;	/* EtherC has RTRATE register */