Unverified Commit 2c247940 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
Browse files

ARM: dts: sun7i: Add CSI1 controller and pinmux options 



The CSI controller driver now supports the second CSI controller, CSI1.

Add a device node for it. Pinmuxing options for the MCLK output, the
standard 8-bit interface, and a secondary 24-bit interface are included.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime@cerno.tech>
parent 7faf7fbf

arch/arm/boot/dts/sun7i-a20.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -729,6 +729,17 @@ 
			status = "disabled";

		};



		csi1: csi@1c1d000 {

			compatible = "allwinner,sun7i-a20-csi1",

				     "allwinner,sun4i-a10-csi1";

			reg = <0x01c1d000 0x1000>;

			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;

			clock-names = "bus", "ram";

			resets = <&ccu RST_CSI1>;

			status = "disabled";

		};



		spi3: spi@1c1f000 {

			compatible = "allwinner,sun4i-a10-spi";

			reg = <0x01c1f000 0x1000>;
@@ -802,6 +813,31 @@ 
				function = "csi0";

			};



			/omit-if-no-ref/

			csi1_8bits_pg_pins: csi1-8bits-pg-pins {

				pins = "PG0", "PG2", "PG3", "PG4", "PG5",

				       "PG6", "PG7", "PG8", "PG9", "PG10",

				       "PG11";

				function = "csi1";

			};



			/omit-if-no-ref/

			csi1_24bits_ph_pins: csi1-24bits-ph-pins {

				pins = "PH0", "PH1", "PH2", "PH3", "PH4",

				       "PH5", "PH6", "PH7", "PH8", "PH9",

				       "PH10", "PH11", "PH12", "PH13", "PH14",

				       "PH15", "PH16", "PH17", "PH18", "PH19",

				       "PH20", "PH21", "PH22", "PH23", "PH24",

				       "PH25", "PH26", "PH27";

				function = "csi1";

			};



			/omit-if-no-ref/

			csi1_clk_pg_pin: csi1-clk-pg-pin {

				pins = "PG1";

				function = "csi1";

			};



			/omit-if-no-ref/

			emac_pa_pins: emac-pa-pins {

				pins = "PA0", "PA1", "PA2",

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