Commit 2bb08085 authored by Rob Herring's avatar Rob Herring
Browse files

ARM: kirkwood: use fixed PCI i/o mapping 



Move kirkwood PCI to fixed i/o mapping and remove io.h.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: default avatarNicolas Pitre <nico@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
parent d191bb69

arch/arm/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -547,7 +547,6 @@ config ARCH_KIRKWOOD 
	select PCI

	select ARCH_REQUIRE_GPIOLIB

	select GENERIC_CLOCKEVENTS

	select NEED_MACH_IO_H

	select PLAT_ORION

	help

	  Support for the following Marvell Kirkwood series SoCs:

arch/arm/mach-kirkwood/common.c

+0 −10
Original line number Diff line number Diff line
@@ -41,16 +41,6 @@ 
 ****************************************************************************/

static struct map_desc kirkwood_io_desc[] __initdata = {

	{

		.virtual	= KIRKWOOD_PCIE_IO_VIRT_BASE,

		.pfn		= __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),

		.length		= KIRKWOOD_PCIE_IO_SIZE,

		.type		= MT_DEVICE,

	}, {

		.virtual	= KIRKWOOD_PCIE1_IO_VIRT_BASE,

		.pfn		= __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),

		.length		= KIRKWOOD_PCIE1_IO_SIZE,

		.type		= MT_DEVICE,

	}, {

		.virtual	= KIRKWOOD_REGS_VIRT_BASE,

		.pfn		= __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),

		.length		= KIRKWOOD_REGS_SIZE,

arch/arm/mach-kirkwood/include/mach/io.h

deleted100644 → 0
+0 −24
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-kirkwood/include/mach/io.h

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



#ifndef __ASM_ARCH_IO_H

#define __ASM_ARCH_IO_H



#include "kirkwood.h"



#define IO_SPACE_LIMIT		0xffffffff



static inline void __iomem *__io(unsigned long addr)

{

	return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_BUS_BASE)

					+ KIRKWOOD_PCIE_IO_VIRT_BASE);

}



#define __io(a)			__io(a)



#endif

arch/arm/mach-kirkwood/include/mach/kirkwood.h

+3 −5
Original line number Diff line number Diff line
@@ -37,14 +37,12 @@ 
#define KIRKWOOD_NAND_MEM_SIZE		SZ_1K



#define KIRKWOOD_PCIE1_IO_PHYS_BASE	0xf3000000

#define KIRKWOOD_PCIE1_IO_VIRT_BASE	0xfef00000

#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00100000

#define KIRKWOOD_PCIE1_IO_SIZE		SZ_1M

#define KIRKWOOD_PCIE1_IO_BUS_BASE	0x00010000

#define KIRKWOOD_PCIE1_IO_SIZE		SZ_64K



#define KIRKWOOD_PCIE_IO_PHYS_BASE	0xf2000000

#define KIRKWOOD_PCIE_IO_VIRT_BASE	0xfee00000

#define KIRKWOOD_PCIE_IO_BUS_BASE	0x00000000

#define KIRKWOOD_PCIE_IO_SIZE		SZ_1M

#define KIRKWOOD_PCIE_IO_SIZE		SZ_64K



#define KIRKWOOD_REGS_PHYS_BASE		0xf1000000

#define KIRKWOOD_REGS_VIRT_BASE		0xfed00000

arch/arm/mach-kirkwood/pcie.c

+13 −31
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ struct pcie_port { 
	void __iomem		*base;

	spinlock_t		conf_lock;

	int			irq;

	struct resource		res[2];

	struct resource		res;

};



static int pcie_port_map[2];
@@ -136,21 +136,13 @@ static void __init pcie0_ioresources_init(struct pcie_port *pp) 
	pp->base = (void __iomem *)PCIE_VIRT_BASE;

	pp->irq	= IRQ_KIRKWOOD_PCIE;



	/*

	 * IORESOURCE_IO

	 */

	pp->res[0].name = "PCIe 0 I/O Space";

	pp->res[0].start = KIRKWOOD_PCIE_IO_BUS_BASE;

	pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;

	pp->res[0].flags = IORESOURCE_IO;



	/*

	 * IORESOURCE_MEM

	 */

	pp->res[1].name = "PCIe 0 MEM";

	pp->res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;

	pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;

	pp->res[1].flags = IORESOURCE_MEM;

	pp->res.name = "PCIe 0 MEM";

	pp->res.start = KIRKWOOD_PCIE_MEM_PHYS_BASE;

	pp->res.end = pp->res.start + KIRKWOOD_PCIE_MEM_SIZE - 1;

	pp->res.flags = IORESOURCE_MEM;

}



static void __init pcie1_ioresources_init(struct pcie_port *pp)
@@ -158,21 +150,13 @@ static void __init pcie1_ioresources_init(struct pcie_port *pp) 
	pp->base = (void __iomem *)PCIE1_VIRT_BASE;

	pp->irq	= IRQ_KIRKWOOD_PCIE1;



	/*

	 * IORESOURCE_IO

	 */

	pp->res[0].name = "PCIe 1 I/O Space";

	pp->res[0].start = KIRKWOOD_PCIE1_IO_BUS_BASE;

	pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;

	pp->res[0].flags = IORESOURCE_IO;



	/*

	 * IORESOURCE_MEM

	 */

	pp->res[1].name = "PCIe 1 MEM";

	pp->res[1].start = KIRKWOOD_PCIE1_MEM_PHYS_BASE;

	pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE1_MEM_SIZE - 1;

	pp->res[1].flags = IORESOURCE_MEM;

	pp->res.name = "PCIe 1 MEM";

	pp->res.start = KIRKWOOD_PCIE1_MEM_PHYS_BASE;

	pp->res.end = pp->res.start + KIRKWOOD_PCIE1_MEM_SIZE - 1;

	pp->res.flags = IORESOURCE_MEM;

}



static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
@@ -197,23 +181,21 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) 
	case 0:

		kirkwood_enable_pcie_clk("0");

		pcie0_ioresources_init(pp);

		pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE_IO_PHYS_BASE);

		break;

	case 1:

		kirkwood_enable_pcie_clk("1");

		pcie1_ioresources_init(pp);

		pci_ioremap_io(SZ_64K * sys->busnr, KIRKWOOD_PCIE1_IO_PHYS_BASE);

		break;

	default:

		panic("PCIe setup: invalid controller %d", index);

	}



	if (request_resource(&ioport_resource, &pp->res[0]))

		panic("Request PCIe%d IO resource failed\n", index);

	if (request_resource(&iomem_resource, &pp->res[1]))

	if (request_resource(&iomem_resource, &pp->res))

		panic("Request PCIe%d Memory resource failed\n", index);



	sys->io_offset = 0;

	pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset);

	pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset);

	pci_add_resource_offset(&sys->resources, &pp->res, sys->mem_offset);



	/*

	 * Generic PCIe unit setup.

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