Commit 2baad612 authored by Jan Beulich's avatar Jan Beulich Committed by H. Peter Anvin
Browse files

x86, crc32-pclmul: Fix build with older binutils 



binutils prior to 2.18 (e.g. the ones found on SLE10) don't support
assembling PEXTRD, so a macro based approach like the one for PCLMULQDQ
in the same file should be used.

This requires making the helper macros capable of recognizing 32-bit
general purpose register operands.

[ hpa: tagging for stable as it is a low risk build fix ]

Signed-off-by: default avatarJan Beulich <jbeulich@suse.com>
Link: http://lkml.kernel.org/r/51A6142A02000078000D99D8@nat28.tlf.novell.com


Cc: Alexander Boyko <alexander_boyko@xyratex.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Huang Ying <ying.huang@intel.com>
Cc: <stable@vger.kernel.org> v3.9
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent e9d0626e

arch/x86/crypto/crc32-pclmul_asm.S

+1 −1
Original line number Diff line number Diff line
@@ -240,7 +240,7 @@ fold_64: 
	pand    %xmm3, %xmm1

	PCLMULQDQ 0x00, CONSTANT, %xmm1

	pxor    %xmm2, %xmm1

	pextrd  $0x01, %xmm1, %eax

	PEXTRD  0x01, %xmm1, %eax



	ret

ENDPROC(crc32_pclmul_le_16)

arch/x86/include/asm/inst.h

+72 −2
Original line number Diff line number Diff line
@@ -9,12 +9,68 @@ 


#define REG_NUM_INVALID		100



#define REG_TYPE_R64		0

#define REG_TYPE_XMM		1

#define REG_TYPE_R32		0

#define REG_TYPE_R64		1

#define REG_TYPE_XMM		2

#define REG_TYPE_INVALID	100



	.macro R32_NUM opd r32

	\opd = REG_NUM_INVALID

	.ifc \r32,%eax

	\opd = 0

	.endif

	.ifc \r32,%ecx

	\opd = 1

	.endif

	.ifc \r32,%edx

	\opd = 2

	.endif

	.ifc \r32,%ebx

	\opd = 3

	.endif

	.ifc \r32,%esp

	\opd = 4

	.endif

	.ifc \r32,%ebp

	\opd = 5

	.endif

	.ifc \r32,%esi

	\opd = 6

	.endif

	.ifc \r32,%edi

	\opd = 7

	.endif

#ifdef CONFIG_X86_64

	.ifc \r32,%r8d

	\opd = 8

	.endif

	.ifc \r32,%r9d

	\opd = 9

	.endif

	.ifc \r32,%r10d

	\opd = 10

	.endif

	.ifc \r32,%r11d

	\opd = 11

	.endif

	.ifc \r32,%r12d

	\opd = 12

	.endif

	.ifc \r32,%r13d

	\opd = 13

	.endif

	.ifc \r32,%r14d

	\opd = 14

	.endif

	.ifc \r32,%r15d

	\opd = 15

	.endif

#endif

	.endm



	.macro R64_NUM opd r64

	\opd = REG_NUM_INVALID

#ifdef CONFIG_X86_64

	.ifc \r64,%rax

	\opd = 0

	.endif
@@ -63,6 +119,7 @@ 
	.ifc \r64,%r15

	\opd = 15

	.endif

#endif

	.endm



	.macro XMM_NUM opd xmm
@@ -118,10 +175,13 @@ 
	.endm



	.macro REG_TYPE type reg

	R32_NUM reg_type_r32 \reg

	R64_NUM reg_type_r64 \reg

	XMM_NUM reg_type_xmm \reg

	.if reg_type_r64 <> REG_NUM_INVALID

	\type = REG_TYPE_R64

	.elseif reg_type_r32 <> REG_NUM_INVALID

	\type = REG_TYPE_R32

	.elseif reg_type_xmm <> REG_NUM_INVALID

	\type = REG_TYPE_XMM

	.else
@@ -162,6 +222,16 @@ 
	.byte \imm8

	.endm



	.macro PEXTRD imm8 xmm gpr

	R32_NUM extrd_opd1 \gpr

	XMM_NUM extrd_opd2 \xmm

	PFX_OPD_SIZE

	PFX_REX extrd_opd1 extrd_opd2

	.byte 0x0f, 0x3a, 0x16

	MODRM 0xc0 extrd_opd1 extrd_opd2

	.byte \imm8

	.endm



	.macro AESKEYGENASSIST rcon xmm1 xmm2

	XMM_NUM aeskeygen_opd1 \xmm1

	XMM_NUM aeskeygen_opd2 \xmm2

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