Commit 2b961e6a authored by John Clements's avatar John Clements Committed by Alex Deucher
Browse files

drm/amdgpu: update RAS related dmesg print 



prefix RAS error related dmesg print with pci device info

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarJohn Clements <john.clements@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0b9ebd7e

drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c

+4 −2
Original line number Diff line number Diff line
@@ -710,14 +710,16 @@ static int gfx_v9_4_query_utc_edc_status(struct amdgpu_device *adev, 


		sec_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, SEC_COUNT);

		if (sec_count) {

			DRM_INFO("Instance[%d]: SubBlock %s, SEC %d\n", i,

			dev_info(adev->dev,

				 "Instance[%d]: SubBlock %s, SEC %d\n", i,

				 vml2_mems[i], sec_count);

			err_data->ce_count += sec_count;

		}



		ded_count = REG_GET_FIELD(data, VML2_MEM_ECC_CNTL, DED_COUNT);

		if (ded_count) {

			DRM_INFO("Instance[%d]: SubBlock %s, DED %d\n", i,

			dev_info(adev->dev,

				 "Instance[%d]: SubBlock %s, DED %d\n", i,

				 vml2_mems[i], ded_count);

			err_data->ue_count += ded_count;

		}

drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c

+8 −5
Original line number Diff line number Diff line
@@ -1539,8 +1539,11 @@ static const struct soc15_reg_entry mmhub_v9_4_edc_cnt_regs[] = { 
	{ SOC15_REG_ENTRY(MMHUB, 0, mmMMEA7_EDC_CNT3), 0, 0, 0 },

};



static int mmhub_v9_4_get_ras_error_count(const struct soc15_reg_entry *reg,

	uint32_t value, uint32_t *sec_count, uint32_t *ded_count)

static int mmhub_v9_4_get_ras_error_count(struct amdgpu_device *adev,

					  const struct soc15_reg_entry *reg,

					  uint32_t value,

					  uint32_t *sec_count,

					  uint32_t *ded_count)

{

	uint32_t i;

	uint32_t sec_cnt, ded_cnt;
@@ -1553,7 +1556,7 @@ static int mmhub_v9_4_get_ras_error_count(const struct soc15_reg_entry *reg, 
				mmhub_v9_4_ras_fields[i].sec_count_mask) >>

				mmhub_v9_4_ras_fields[i].sec_count_shift;

		if (sec_cnt) {

			DRM_INFO("MMHUB SubBlock %s, SEC %d\n",

			dev_info(adev->dev, "MMHUB SubBlock %s, SEC %d\n",

				mmhub_v9_4_ras_fields[i].name,

				sec_cnt);

			*sec_count += sec_cnt;
@@ -1563,7 +1566,7 @@ static int mmhub_v9_4_get_ras_error_count(const struct soc15_reg_entry *reg, 
				mmhub_v9_4_ras_fields[i].ded_count_mask) >>

				mmhub_v9_4_ras_fields[i].ded_count_shift;

		if (ded_cnt) {

			DRM_INFO("MMHUB SubBlock %s, DED %d\n",

			dev_info(adev->dev, "MMHUB SubBlock %s, DED %d\n",

				mmhub_v9_4_ras_fields[i].name,

				ded_cnt);

			*ded_count += ded_cnt;
@@ -1588,7 +1591,7 @@ static void mmhub_v9_4_query_ras_error_count(struct amdgpu_device *adev, 
		reg_value =

			RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v9_4_edc_cnt_regs[i]));

		if (reg_value)

			mmhub_v9_4_get_ras_error_count(&mmhub_v9_4_edc_cnt_regs[i],

			mmhub_v9_4_get_ras_error_count(adev, &mmhub_v9_4_edc_cnt_regs[i],

				reg_value, &sec_count, &ded_count);

	}

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