rseq/selftests: arm: use udf instruction for RSEQ_SIG (2b845d4b) · Commits · 戴 / test

Use udf as the guard instruction for the restartable sequence abort handler. Previously, the chosen signature was not a valid instruction, based on the assumption that it could always sit in a literal pool. However, there are compilation environments in which literal pools are not available, for instance execute-only code. Therefore, we need to choose a signature value that is also a valid instruction. Handle compiling with -mbig-endian on ARMv6+, which generates binaries with mixed code vs data endianness (little endian code, big endian data). Else mismatch between code endianness for the generated signatures and data endianness for the RSEQ_SIG parameter passed to the rseq registration will trigger application segmentation faults when the kernel try to abort rseq critical sections. Prior to ARMv6, -mbig-endian generates big-endian code and data, so endianness should not be reversed in that case. Signed-off-by:

Mathieu Desnoyers <mathieu.desnoyers@efficios.com> CC: Peter Zijlstra <peterz@infradead.org> CC: Thomas Gleixner <tglx@linutronix.de> CC: Joel Fernandes <joelaf@google.com> CC: Catalin Marinas <catalin.marinas@arm.com> CC: Dave Watson <davejwatson@fb.com> CC: Will Deacon <will.deacon@arm.com> CC: Shuah Khan <shuah@kernel.org> CC: Andi Kleen <andi@firstfloor.org> CC: linux-kselftest@vger.kernel.org CC: "H . Peter Anvin" <hpa@zytor.com> CC: Chris Lameter <cl@linux.com> CC: Russell King <linux@arm.linux.org.uk> CC: Michael Kerrisk <mtk.manpages@gmail.com> CC: "Paul E . McKenney" <paulmck@linux.vnet.ibm.com> CC: Paul Turner <pjt@google.com> CC: Boqun Feng <boqun.feng@gmail.com> CC: Josh Triplett <josh@joshtriplett.org> CC: Steven Rostedt <rostedt@goodmis.org> CC: Ben Maurer <bmaurer@fb.com> CC: linux-api@vger.kernel.org CC: Andy Lutomirski <luto@amacapital.net> CC: Andrew Morton <akpm@linux-foundation.org> CC: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by:

Shuah Khan <skhan@linuxfoundation.org>

tools/testing/selftests/rseq/rseq-arm.h

+50 −2

Original line number	Diff line number	Diff line
		@@ -5,7 +5,54 @@
		* (C) Copyright 2016-2018 - Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
		*/

		#define RSEQ_SIG 0x53053053
		/*
		* RSEQ_SIG uses the udf A32 instruction with an uncommon immediate operand
		* value 0x5de3. This traps if user-space reaches this instruction by mistake,
		* and the uncommon operand ensures the kernel does not move the instruction
		* pointer to attacker-controlled code on rseq abort.
		*
		* The instruction pattern in the A32 instruction set is:
		*
		* e7f5def3 udf #24035 ; 0x5de3
		*
		* This translates to the following instruction pattern in the T16 instruction
		* set:
		*
		* little endian:
		* def3 udf #243 ; 0xf3
		* e7f5 b.n <7f5>
		*
		* pre-ARMv6 big endian code:
		* e7f5 b.n <7f5>
		* def3 udf #243 ; 0xf3
		*
		* ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian
		* code and big-endian data. Ensure the RSEQ_SIG data signature matches code
		* endianness. Prior to ARMv6, -mbig-endian generates big-endian code and data
		* (which match), so there is no need to reverse the endianness of the data
		* representation of the signature. However, the choice between BE32 and BE8
		* is done by the linker, so we cannot know whether code and data endianness
		* will be mixed before the linker is invoked.
		*/

		#define RSEQ_SIG_CODE 0xe7f5def3

		#ifndef __ASSEMBLER__

		#define RSEQ_SIG_DATA \
		({ \
		int sig; \
		asm volatile ("b 2f\n\t" \
		"1: .inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \
		"2:\n\t" \
		"ldr %[sig], 1b\n\t" \
		: [sig] "=r" (sig)); \
		sig; \
		})

		#define RSEQ_SIG RSEQ_SIG_DATA

		#endif

		#define rseq_smp_mb() __asm__ __volatile__ ("dmb" ::: "memory", "cc")
		#define rseq_smp_rmb() __asm__ __volatile__ ("dmb" ::: "memory", "cc")
		@@ -78,7 +125,8 @@ do { \
		__rseq_str(table_label) ":\n\t" \
		".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \
		".word " __rseq_str(start_ip) ", 0x0, " __rseq_str(post_commit_offset) ", 0x0, " __rseq_str(abort_ip) ", 0x0\n\t" \
		".word " __rseq_str(RSEQ_SIG) "\n\t" \
		".arm\n\t" \
		".inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \
		__rseq_str(label) ":\n\t" \
		teardown \
		"b %l[" __rseq_str(abort_label) "]\n\t"

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