Commit 2b326d8b authored by Yong Wu's avatar Yong Wu Committed by Joerg Roedel
Browse files

iommu/mediatek: Move vld_pa_rng into plat_data



Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
range) register while mt2712 have. Move it into the plat_data.

Signed-off-by: default avatarYong Wu <yong.wu@mediatek.com>
Reviewed-by: default avatarEvan Green <evgreen@chromium.org>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 50822b0b
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -567,7 +567,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
			 upper_32_bits(data->protect_base);
	writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR);

	if (data->enable_4GB && data->plat_data->m4u_plat != M4U_MT8173) {
	if (data->enable_4GB && data->plat_data->has_vld_pa_rng) {
		/*
		 * If 4GB mode is enabled, the validate PA range is from
		 * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30].
@@ -766,6 +766,7 @@ static const struct mtk_iommu_plat_data mt2712_data = {
	.m4u_plat     = M4U_MT2712,
	.has_4gb_mode = true,
	.has_bclk     = true,
	.has_vld_pa_rng   = true,
	.larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
};

+1 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ struct mtk_iommu_plat_data {

	/* HW will use the EMI clock if there isn't the "bclk". */
	bool                has_bclk;
	bool                has_vld_pa_rng;
	bool                reset_axi;
	unsigned char       larbid_remap[MTK_LARB_NR_MAX];
};