Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Hisilicon Hi6220 Mailbox Driver

===============================

Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel

is unidirectional with a maximum message size of 8 words. I/O is

performed using register access (there is no DMA) and the cell

raises an interrupt when messages are received.

Mailbox Device Node:

====================

Required properties:

--------------------

- compatible:		Shall be "hisilicon,hi6220-mbox"

- reg:			Contains the mailbox register address range (base

			address and length); the first item is for IPC

			registers, the second item is shared buffer for

			slots.

- #mbox-cells:		Common mailbox binding property to identify the number

			of cells required for the mailbox specifier. Must be 3.

			<&phandle slot_id dst_irq ack_irq>

			  phandle: Label name of mailbox controller

			  slot_id: Slot id used either for TX or RX

			  dst_irq: IRQ identifier index number which used by MCU

			  ack_irq: IRQ identifier index number with generating a

			           TX/RX interrupt to application processor,

				   mailbox driver uses it to acknowledge interrupt

- interrupts:		Contains the interrupt information for the mailbox

			device. The format is dependent on which interrupt

			controller the SoCs use.

Optional Properties:

--------------------

- hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver

			use this flag to ask MCU to enable "automatic idle

			flag" mode or IRQ generated mode to acknowledge a TX

			completion.

Example:

--------

	mailbox: mailbox@f7510000 {

		compatible = "hisilicon,hi6220-mbox";

		reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */

		      <0x0 0x06dff800 0x0 0x0800>; /* Mailbox */

		interrupt-parent = <&gic>;

		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;

		#mbox-cells = <3>;

	};

Mailbox client

===============

Required properties:

--------------------

- compatible:		Many (See the client docs).

- mboxes:		Standard property to specify a Mailbox (See ./mailbox.txt)

			Cells must match 'mbox-cells' (See Mailbox Device Node above).

Optional Properties:

--------------------

- mbox-names:		Name given to channels seen in the 'mboxes' property.

Example:

--------

	stub_clock: stub_clock {

		compatible = "hisilicon,hi6220-stub-clk";

		hisilicon,hi6220-clk-sram = <&sram>;

		#clock-cells = <1>;

		mbox-names = "mbox-tx", "mbox-rx";

		mboxes = <&mailbox 1 0 11>, <&mailbox 0 1 10>;

	};

Rockchip mailbox

The Rockchip mailbox is used by the Rockchip CPU cores to communicate

requests to MCU processor.

Refer to ./mailbox.txt for generic information about mailbox device-tree

bindings.

Required properties:

 - compatible: should be one of the following.

   - "rockchip,rk3368-mbox" for rk3368

 - reg: physical base address of the controller and length of memory mapped

	region.

 - interrupts: The interrupt number to the cpu. The interrupt specifier format

	depends on the interrupt controller.

 - #mbox-cells: Common mailbox binding property to identify the number

	of cells required for the mailbox specifier. Should be 1

Example:

--------

/* RK3368 */

mbox: mbox@ff6b0000 {

	compatible = "rockchip,rk3368-mailbox";

	reg = <0x0 0xff6b0000 0x0 0x1000>,

	interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,

		     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;

	#mbox-cells = <1>;

};

Example:

mailbox_test {

	compatible	= "mailbox_test";

	compatible	= "mailbox-test";

	reg		= <0x[shared_memory_address], [shared_memory_size]>;

	mboxes		= <&mailbox2 0 1>, <&mailbox0 2 1>;

	mbox-names	= "tx",	"rx";

The APM X-Gene SLIMpro mailbox is used to communicate messages between

the ARM64 processors and the Cortex M3 (dubbed SLIMpro). It uses a simple

interrupt based door bell mechanism and can exchange simple messages using the

internal registers.

There are total of 8 interrupts in this mailbox. Each used for an individual

door bell (or mailbox channel).

Required properties:

- compatible:	Should be as "apm,xgene-slimpro-mbox".

- reg:		Contains the mailbox register address range.

- interrupts:	8 interrupts must be from 0 to 7, interrupt 0 define the

		the interrupt for mailbox channel 0 and interrupt 1 for

		mailbox channel 1 and so likewise for the reminder.

- #mbox-cells:	only one to specify the mailbox channel number.

Example:

Mailbox Node:

		mailbox: mailbox@10540000 {

			compatible = "apm,xgene-slimpro-mbox";

			reg = <0x0 0x10540000 0x0 0xa000>;

			#mbox-cells = <1>;

			interrupts =  	<0x0 0x0 0x4>,

					<0x0 0x1 0x4>,

					<0x0 0x2 0x4>,

					<0x0 0x3 0x4>,

					<0x0 0x4 0x4>,

					<0x0 0x5 0x4>,

					<0x0 0x6 0x4>,

					<0x0 0x7 0x4>,

		};

	  This can also be changed at runtime (via the mbox_kfifo_size

	  module parameter).

config ROCKCHIP_MBOX

	bool "Rockchip Soc Intergrated Mailbox Support"

	depends on ARCH_ROCKCHIP || COMPILE_TEST

	help

	  This driver provides support for inter-processor communication

	  between CPU cores and MCU processor on Some Rockchip SOCs.

	  Please check it that the Soc you use have Mailbox hardware.

	  Say Y here if you want to use the Rockchip Mailbox support.

config PCC

	bool "Platform Communication Channel Driver"

	depends on ACPI

	  Mailbox implementation for STMicroelectonics family chips with

	  hardware for interprocessor communication.

config HI6220_MBOX

	tristate "Hi6220 Mailbox"

	depends on ARCH_HISI

	help

	  An implementation of the hi6220 mailbox. It is used to send message

	  between application processors and MCU. Say Y here if you want to

	  build Hi6220 mailbox controller driver.

config MAILBOX_TEST

	tristate "Mailbox Test Client"

	depends on OF

	  Test client to help with testing new Controller driver

	  implementations.

config XGENE_SLIMPRO_MBOX

	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"

	depends on ARCH_XGENE

	help

	  An implementation of the APM X-Gene Interprocessor Communication

	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.

	  It is used to send short messages between ARM64-bit cores and

	  the SLIMpro Management Engine, primarily for PM. Say Y here if you

	  want to use the APM X-Gene SLIMpro IPCM support.

endif