Commit 2af0f378 authored by Nikola Cornij's avatar Nikola Cornij Committed by Alex Deucher
Browse files

drm/amd/display: Add debug option to override DSC target bpp increment 



[why]
It's required for debug purposes.

[how]
Add a dsc_bpp_increment_div debug option that overrides DPCD
BITS_PER_PIXEL_INCREMENT value. The value dsc_bpp_increment_div should
be set to is the one after parsing, i.e. it could be 1, 2, 4, 8 or 16
(meaning 1pix, 1/2pix, ..., 1/16pix).

Signed-off-by: default avatarNikola Cornij <nikola.cornij@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e97ed496

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+2 −1
Original line number Diff line number Diff line
@@ -4075,7 +4075,8 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, 


	if (aconnector->dc_link && sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT) {

#if defined(CONFIG_DRM_AMD_DC_DCN)

		dc_dsc_parse_dsc_dpcd(aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,

		dc_dsc_parse_dsc_dpcd(aconnector->dc_link->ctx->dc,

				      aconnector->dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.raw,

				      aconnector->dc_link->dpcd_caps.dsc_caps.dsc_ext_caps.raw,

				      &dsc_caps);

#endif

drivers/gpu/drm/amd/display/dc/dc.h

+1 −0
Original line number Diff line number Diff line
@@ -367,6 +367,7 @@ struct dc_debug_options { 
	bool disable_hubp_power_gate;

	bool disable_dsc_power_gate;

	int dsc_min_slice_height_override;

	int dsc_bpp_increment_div;

	bool native422_support;

	bool disable_pplib_wm_range;

	enum wm_report_mode pplib_wm_report_mode;

drivers/gpu/drm/amd/display/dc/dc_dsc.h

+2 −1
Original line number Diff line number Diff line
@@ -53,7 +53,8 @@ struct dc_dsc_policy { 
	uint32_t min_target_bpp;

};



bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data,

bool dc_dsc_parse_dsc_dpcd(const struct dc *dc,

		const uint8_t *dpcd_dsc_basic_data,

		const uint8_t *dpcd_dsc_ext_data,

		struct dsc_dec_dpcd_caps *dsc_sink_caps);

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+18 −1
Original line number Diff line number Diff line
@@ -760,7 +760,7 @@ done: 
	return is_dsc_possible;

}



bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps)

bool dc_dsc_parse_dsc_dpcd(const struct dc *dc, const uint8_t *dpcd_dsc_basic_data, const uint8_t *dpcd_dsc_ext_data, struct dsc_dec_dpcd_caps *dsc_sink_caps)

{

	if (!dpcd_dsc_basic_data)

		return false;
@@ -813,6 +813,23 @@ bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data, const uint8_t *dp 
	if (!dsc_bpp_increment_div_from_dpcd(dpcd_dsc_basic_data[DP_DSC_BITS_PER_PIXEL_INC - DP_DSC_SUPPORT], &dsc_sink_caps->bpp_increment_div))

		return false;



	if (dc->debug.dsc_bpp_increment_div) {

		/* dsc_bpp_increment_div should onl be 1, 2, 4, 8 or 16, but rather than rejecting invalid values,

		 * we'll accept all and get it into range. This also makes the above check against 0 redundant,

		 * but that one stresses out the override will be only used if it's not 0.

		 */

		if (dc->debug.dsc_bpp_increment_div >= 1)

			dsc_sink_caps->bpp_increment_div = 1;

		if (dc->debug.dsc_bpp_increment_div >= 2)

			dsc_sink_caps->bpp_increment_div = 2;

		if (dc->debug.dsc_bpp_increment_div >= 4)

			dsc_sink_caps->bpp_increment_div = 4;

		if (dc->debug.dsc_bpp_increment_div >= 8)

			dsc_sink_caps->bpp_increment_div = 8;

		if (dc->debug.dsc_bpp_increment_div >= 16)

			dsc_sink_caps->bpp_increment_div = 16;

	}



	/* Extended caps */

	if (dpcd_dsc_ext_data == NULL) { // Extended DPCD DSC data can be null, e.g. because it doesn't apply to SST

		dsc_sink_caps->branch_overall_throughput_0_mps = 0;

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