Commit 2ad4da77 authored by Vivien Didelot's avatar Vivien Didelot Committed by David S. Miller
Browse files

net: dsa: mv88e6xxx: remove wait and update routines 



Now that we have proper Wait Bit and Wait Mask routines, remove the
unused mv88e6xxx_wait routine and its Global 1 and Global 2 variants.

The indirect tables such as the Device Mapping Table or Priority
Override Table make use of an Update bit to distinguish reading (0)
from writing (1) operations. After a write operation occurs, the bit
self clears right away so there's no need to wait on it. Thus keep
things simple and remove the mv88e6xxx_update helper as well.

Signed-off-by: default avatarVivien Didelot <vivien.didelot@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 28ae1e96

drivers/net/dsa/mv88e6xxx/chip.c

+0 −22
Original line number Diff line number Diff line
@@ -394,28 +394,6 @@ static void mv88e6xxx_irq_poll_free(struct mv88e6xxx_chip *chip) 
	mv88e6xxx_reg_unlock(chip);

}



int mv88e6xxx_wait(struct mv88e6xxx_chip *chip, int addr, int reg, u16 mask)

{

	return mv88e6xxx_wait_mask(chip, addr, reg, mask, 0x0000);

}



/* Indirect write to single pointer-data register with an Update bit */

int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg, u16 update)

{

	u16 val;

	int err;



	/* Wait until the previous operation is completed */

	err = mv88e6xxx_wait(chip, addr, reg, BIT(15));

	if (err)

		return err;



	/* Set the Update bit to trigger a write operation */

	val = BIT(15) | update;



	return mv88e6xxx_write(chip, addr, reg, val);

}



int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port, int link,

			     int speed, int duplex, int pause,

			     phy_interface_t mode)

drivers/net/dsa/mv88e6xxx/chip.h

+0 −3
Original line number Diff line number Diff line
@@ -590,11 +590,8 @@ int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val); 
int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);

int mv88e6xxx_wait_mask(struct mv88e6xxx_chip *chip, int addr, int reg,

			u16 mask, u16 val);

int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg,

		     u16 update);

int mv88e6xxx_wait_bit(struct mv88e6xxx_chip *chip, int addr, int reg,

		       int bit, int val);

int mv88e6xxx_wait(struct mv88e6xxx_chip *chip, int addr, int reg, u16 mask);

int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port, int link,

			     int speed, int duplex, int pause,

			     phy_interface_t mode);

drivers/net/dsa/mv88e6xxx/global1.c

+0 −5
Original line number Diff line number Diff line
@@ -27,11 +27,6 @@ int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val) 
	return mv88e6xxx_write(chip, addr, reg, val);

}



int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask)

{

	return mv88e6xxx_wait(chip, chip->info->global1_addr, reg, mask);

}



int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int

			  bit, int val)

{

drivers/net/dsa/mv88e6xxx/global1.h

+0 −1
Original line number Diff line number Diff line
@@ -249,7 +249,6 @@ 


int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);

int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);

int mv88e6xxx_g1_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask);

int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int

			  bit, int val);

int mv88e6xxx_g1_wait_mask(struct mv88e6xxx_chip *chip, int reg,

drivers/net/dsa/mv88e6xxx/global2.c

+20 −23
Original line number Diff line number Diff line
@@ -26,16 +26,6 @@ int mv88e6xxx_g2_write(struct mv88e6xxx_chip *chip, int reg, u16 val) 
	return mv88e6xxx_write(chip, chip->info->global2_addr, reg, val);

}



int mv88e6xxx_g2_update(struct mv88e6xxx_chip *chip, int reg, u16 update)

{

	return mv88e6xxx_update(chip, chip->info->global2_addr, reg, update);

}



int mv88e6xxx_g2_wait(struct mv88e6xxx_chip *chip, int reg, u16 mask)

{

	return mv88e6xxx_wait(chip, chip->info->global2_addr, reg, mask);

}



int mv88e6xxx_g2_wait_bit(struct mv88e6xxx_chip *chip, int reg, int

			  bit, int val)

{
@@ -130,7 +120,8 @@ int mv88e6xxx_g2_device_mapping_write(struct mv88e6xxx_chip *chip, int target, 
	 * but bit 4 is reserved on older chips, so it is safe to use.

	 */



	return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_DEVICE_MAPPING, val);

	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_DEVICE_MAPPING,

				  MV88E6XXX_G2_DEVICE_MAPPING_UPDATE | val);

}



/* Offset 0x07: Trunk Mask Table register */
@@ -143,7 +134,8 @@ static int mv88e6xxx_g2_trunk_mask_write(struct mv88e6xxx_chip *chip, int num, 
	if (hash)

		val |= MV88E6XXX_G2_TRUNK_MASK_HASH;



	return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_TRUNK_MASK, val);

	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MASK,

				  MV88E6XXX_G2_TRUNK_MASK_UPDATE | val);

}



/* Offset 0x08: Trunk Mapping Table register */
@@ -154,7 +146,8 @@ static int mv88e6xxx_g2_trunk_mapping_write(struct mv88e6xxx_chip *chip, int id, 
	const u16 port_mask = BIT(mv88e6xxx_num_ports(chip)) - 1;

	u16 val = (id << 11) | (map & port_mask);



	return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_TRUNK_MAPPING, val);

	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_TRUNK_MAPPING,

				  MV88E6XXX_G2_TRUNK_MAPPING_UPDATE | val);

}



int mv88e6xxx_g2_trunk_clear(struct mv88e6xxx_chip *chip)
@@ -270,7 +263,8 @@ static int mv88e6xxx_g2_switch_mac_write(struct mv88e6xxx_chip *chip, 
{

	u16 val = (pointer << 8) | data;



	return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_SWITCH_MAC, val);

	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SWITCH_MAC,

				  MV88E6XXX_G2_SWITCH_MAC_UPDATE | val);

}



int mv88e6xxx_g2_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr)
@@ -293,7 +287,8 @@ static int mv88e6xxx_g2_pot_write(struct mv88e6xxx_chip *chip, int pointer, 
{

	u16 val = (pointer << 8) | (data & 0x7);



	return mv88e6xxx_g2_update(chip, MV88E6XXX_G2_PRIO_OVERRIDE, val);

	return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_PRIO_OVERRIDE,

				  MV88E6XXX_G2_PRIO_OVERRIDE_UPDATE | val);

}



int mv88e6xxx_g2_pot_clear(struct mv88e6xxx_chip *chip)
@@ -857,7 +852,8 @@ const struct mv88e6xxx_irq_ops mv88e6250_watchdog_ops = { 


static int mv88e6390_watchdog_setup(struct mv88e6xxx_chip *chip)

{

	return mv88e6xxx_g2_update(chip, MV88E6390_G2_WDOG_CTL,

	return mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,

				  MV88E6390_G2_WDOG_CTL_UPDATE |

				  MV88E6390_G2_WDOG_CTL_PTR_INT_ENABLE |

				  MV88E6390_G2_WDOG_CTL_CUT_THROUGH |

				  MV88E6390_G2_WDOG_CTL_QUEUE_CONTROLLER |
@@ -895,7 +891,8 @@ static int mv88e6390_watchdog_action(struct mv88e6xxx_chip *chip, int irq) 


static void mv88e6390_watchdog_free(struct mv88e6xxx_chip *chip)

{

	mv88e6xxx_g2_update(chip, MV88E6390_G2_WDOG_CTL,

	mv88e6xxx_g2_write(chip, MV88E6390_G2_WDOG_CTL,

			   MV88E6390_G2_WDOG_CTL_UPDATE |

			   MV88E6390_G2_WDOG_CTL_PTR_INT_ENABLE);

}

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