Commit 2ab7e274 authored Feb 28, 2020 by Yintian Tao Committed by Alex Deucher Mar 05, 2020

drm/amdgpu: clean wptr on wb when gpu recovery



The TDR will be randomly failed due to compute ring
test failure. If the compute ring wptr & 0x7ff(ring_buf_mask)
is 0x100 then after map mqd the compute ring rptr will be
synced with 0x100. And the ring test packet size is also 0x100.
Then after invocation of amdgpu_ring_commit, the cp will not
really handle the packet on the ring buffer because rptr is equal to wptr.

Signed-off-by: Yintian Tao <yttao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 70b8ea1a

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -3513,6 +3513,7 @@ static int gfx_v10_0_kcq_init_queue(struct amdgpu_ring *ring)

		/* reset ring buffer */
		ring->wptr = 0;
		atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0);
		amdgpu_ring_clear_ring(ring);
		} else {
		amdgpu_ring_clear_ring(ring);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -3663,6 +3663,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)

		/* reset ring buffer */
		ring->wptr = 0;
		atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0);
		amdgpu_ring_clear_ring(ring);
		} else {
		amdgpu_ring_clear_ring(ring);

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