Commit 2a99283c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-dsa-mv88e6xxx-support-for-mv88e6250' 



Rasmus Villemoes says:

====================
net: dsa: mv88e6xxx: support for mv88e6250

This adds support for the mv88e6250 chip. Initially based on the
mv88e6240, this time around, I've been through each ->ops callback and
checked that it makes sense, either replacing with a 6250 specific
variant or dropping it if no equivalent functionality seems to exist
for the 6250. Along the way, I found a few oddities in the existing
code, mostly sent as separate patches/questions.

The one relevant to the 6250 is the ieee_pri_map callback, where the
existing mv88e6085_g1_ieee_pri_map() is actually wrong for many of the
existing users. I've put the mv88e6250_g1_ieee_pri_map() patch first
in case some of the existing chips get switched over to use that and
it is deemed important enough for -stable.

v4:
- fix style issue in 1/10
- add Andrew's reviewed-by to 1,6,7,8,9,10.

v3:
- rebase on top of net-next/master
- add reviewed-bys to patches unchanged from v2 (2,3,4,5)
- add 6250-specific ->ieee_pri_map, ->port_set_speed, ->port_link_state (1,6,7)
- in addition, use mv88e6065_phylink_validate for ->phylink_validate,
  and don't implement ->port_get_cmode, ->port_set_jumbo_size,
  ->port_disable_learn_limit, ->rmu_disable
- drop ptp support
- add patch adding the compatible string to the DT binding (9)
- add small refactoring patch (10)

v2:
- rebase on top of net-next/master
- add reviewed-by to two patches unchanged from v1 (2,3)
- add separate watchdog_ops
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3dd7400b 7358fd80

Documentation/devicetree/bindings/net/dsa/marvell.txt

+5 −2
Original line number Diff line number Diff line
@@ -21,10 +21,13 @@ which is at a different MDIO base address in different switch families. 
			  6341, 6350, 6351, 6352

- "marvell,mv88e6190"	: Switch has base address 0x00. Use with models:

			  6190, 6190X, 6191, 6290, 6390, 6390X

- "marvell,mv88e6250"	: Switch has base address 0x08 or 0x18. Use with model:

			  6250



Required properties:

- compatible		: Should be one of "marvell,mv88e6085" or

			  "marvell,mv88e6190" as indicated above

- compatible		: Should be one of "marvell,mv88e6085",

			  "marvell,mv88e6190" or "marvell,mv88e6250" as

			  indicated above

- reg			: Address on the MII bus for the switch.



Optional properties:

drivers/net/dsa/mv88e6xxx/chip.c

+81 −0
Original line number Diff line number Diff line
@@ -829,6 +829,12 @@ static int mv88e6095_stats_get_strings(struct mv88e6xxx_chip *chip, 
					   STATS_TYPE_BANK0 | STATS_TYPE_PORT);

}



static int mv88e6250_stats_get_strings(struct mv88e6xxx_chip *chip,

				       uint8_t *data)

{

	return mv88e6xxx_stats_get_strings(chip, data, STATS_TYPE_BANK0);

}



static int mv88e6320_stats_get_strings(struct mv88e6xxx_chip *chip,

				       uint8_t *data)

{
@@ -899,6 +905,11 @@ static int mv88e6095_stats_get_sset_count(struct mv88e6xxx_chip *chip) 
					      STATS_TYPE_PORT);

}



static int mv88e6250_stats_get_sset_count(struct mv88e6xxx_chip *chip)

{

	return mv88e6xxx_stats_get_sset_count(chip, STATS_TYPE_BANK0);

}



static int mv88e6320_stats_get_sset_count(struct mv88e6xxx_chip *chip)

{

	return mv88e6xxx_stats_get_sset_count(chip, STATS_TYPE_BANK0 |
@@ -966,6 +977,13 @@ static int mv88e6095_stats_get_stats(struct mv88e6xxx_chip *chip, int port, 
					 0, MV88E6XXX_G1_STATS_OP_HIST_RX_TX);

}



static int mv88e6250_stats_get_stats(struct mv88e6xxx_chip *chip, int port,

				     uint64_t *data)

{

	return mv88e6xxx_stats_get_stats(chip, port, data, STATS_TYPE_BANK0,

					 0, MV88E6XXX_G1_STATS_OP_HIST_RX_TX);

}



static int mv88e6320_stats_get_stats(struct mv88e6xxx_chip *chip, int port,

				     uint64_t *data)

{
@@ -3448,6 +3466,44 @@ static const struct mv88e6xxx_ops mv88e6240_ops = { 
	.phylink_validate = mv88e6352_phylink_validate,

};



static const struct mv88e6xxx_ops mv88e6250_ops = {

	/* MV88E6XXX_FAMILY_6250 */

	.ieee_pri_map = mv88e6250_g1_ieee_pri_map,

	.ip_pri_map = mv88e6085_g1_ip_pri_map,

	.irl_init_all = mv88e6352_g2_irl_init_all,

	.get_eeprom = mv88e6xxx_g2_get_eeprom16,

	.set_eeprom = mv88e6xxx_g2_set_eeprom16,

	.set_switch_mac = mv88e6xxx_g2_set_switch_mac,

	.phy_read = mv88e6xxx_g2_smi_phy_read,

	.phy_write = mv88e6xxx_g2_smi_phy_write,

	.port_set_link = mv88e6xxx_port_set_link,

	.port_set_duplex = mv88e6xxx_port_set_duplex,

	.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,

	.port_set_speed = mv88e6250_port_set_speed,

	.port_tag_remap = mv88e6095_port_tag_remap,

	.port_set_frame_mode = mv88e6351_port_set_frame_mode,

	.port_set_egress_floods = mv88e6352_port_set_egress_floods,

	.port_set_ether_type = mv88e6351_port_set_ether_type,

	.port_egress_rate_limiting = mv88e6097_port_egress_rate_limiting,

	.port_pause_limit = mv88e6097_port_pause_limit,

	.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,

	.port_link_state = mv88e6250_port_link_state,

	.stats_snapshot = mv88e6320_g1_stats_snapshot,

	.stats_set_histogram = mv88e6095_g1_stats_set_histogram,

	.stats_get_sset_count = mv88e6250_stats_get_sset_count,

	.stats_get_strings = mv88e6250_stats_get_strings,

	.stats_get_stats = mv88e6250_stats_get_stats,

	.set_cpu_port = mv88e6095_g1_set_cpu_port,

	.set_egress_port = mv88e6095_g1_set_egress_port,

	.watchdog_ops = &mv88e6250_watchdog_ops,

	.mgmt_rsvd2cpu = mv88e6352_g2_mgmt_rsvd2cpu,

	.pot_clear = mv88e6xxx_g2_pot_clear,

	.reset = mv88e6250_g1_reset,

	.vtu_getnext = mv88e6250_g1_vtu_getnext,

	.vtu_loadpurge = mv88e6250_g1_vtu_loadpurge,

	.phylink_validate = mv88e6065_phylink_validate,

};



static const struct mv88e6xxx_ops mv88e6290_ops = {

	/* MV88E6XXX_FAMILY_6390 */

	.setup_errata = mv88e6390_setup_errata,
@@ -4233,6 +4289,27 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { 
		.ops = &mv88e6240_ops,

	},



	[MV88E6250] = {

		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6250,

		.family = MV88E6XXX_FAMILY_6250,

		.name = "Marvell 88E6250",

		.num_databases = 64,

		.num_ports = 7,

		.num_internal_phys = 5,

		.max_vid = 4095,

		.port_base_addr = 0x08,

		.phy_base_addr = 0x00,

		.global1_addr = 0x0f,

		.global2_addr = 0x07,

		.age_time_coeff = 15000,

		.g1_irqs = 9,

		.g2_irqs = 10,

		.atu_move_port_mask = 0xf,

		.dual_chip = true,

		.tag_protocol = DSA_TAG_PROTO_DSA,

		.ops = &mv88e6250_ops,

	},



	[MV88E6290] = {

		.prod_num = MV88E6XXX_PORT_SWITCH_ID_PROD_6290,

		.family = MV88E6XXX_FAMILY_6390,
@@ -4841,6 +4918,10 @@ static const struct of_device_id mv88e6xxx_of_match[] = { 
		.compatible = "marvell,mv88e6190",

		.data = &mv88e6xxx_table[MV88E6190],

	},

	{

		.compatible = "marvell,mv88e6250",

		.data = &mv88e6xxx_table[MV88E6250],

	},

	{ /* sentinel */ },

};

drivers/net/dsa/mv88e6xxx/chip.h

+8 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ enum mv88e6xxx_model { 
	MV88E6190X,

	MV88E6191,

	MV88E6240,

	MV88E6250,

	MV88E6290,

	MV88E6320,

	MV88E6321,
@@ -80,6 +81,7 @@ enum mv88e6xxx_family { 
	MV88E6XXX_FAMILY_6097,	/* 6046 6085 6096 6097 */

	MV88E6XXX_FAMILY_6165,	/* 6123 6161 6165 */

	MV88E6XXX_FAMILY_6185,	/* 6108 6121 6122 6131 6152 6155 6182 6185 */

	MV88E6XXX_FAMILY_6250,	/* 6250 */

	MV88E6XXX_FAMILY_6320,	/* 6320 6321 */

	MV88E6XXX_FAMILY_6341,	/* 6141 6341 */

	MV88E6XXX_FAMILY_6351,	/* 6171 6175 6350 6351 */
@@ -112,6 +114,12 @@ struct mv88e6xxx_info { 
	 * when it is non-zero, and use indirect access to internal registers.

	 */

	bool multi_chip;

	/* Dual-chip Addressing Mode

	 * Some chips respond to only half of the 32 SMI addresses,

	 * allowing two to coexist on the same SMI interface.

	 */

	bool dual_chip;



	enum dsa_tag_protocol tag_protocol;



	/* Mask for FromPort and ToPort value of PortVec used in ATU Move

drivers/net/dsa/mv88e6xxx/global1.c

+15 −2
Original line number Diff line number Diff line
@@ -182,7 +182,7 @@ int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip) 
	return mv88e6185_g1_wait_ppu_polling(chip);

}



int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip)

int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip)

{

	u16 val;

	int err;
@@ -198,7 +198,14 @@ int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip) 
	if (err)

		return err;



	err = mv88e6xxx_g1_wait_init_ready(chip);

	return mv88e6xxx_g1_wait_init_ready(chip);

}



int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip)

{

	int err;



	err = mv88e6250_g1_reset(chip);

	if (err)

		return err;
@@ -299,6 +306,12 @@ int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip) 
	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);

}



int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip)

{

	/* Reset the IEEE Tag priorities to defaults */

	return mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa50);

}



/* Offset 0x1a: Monitor Control */

/* Offset 0x1a: Monitor & MGMT Control on some devices */

drivers/net/dsa/mv88e6xxx/global1.h

+7 −0
Original line number Diff line number Diff line
@@ -259,6 +259,7 @@ int mv88e6xxx_g1_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr); 


int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip);

int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip);

int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip);



int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);

int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
@@ -277,7 +278,9 @@ int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port); 
int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);



int mv88e6085_g1_ip_pri_map(struct mv88e6xxx_chip *chip);



int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);

int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);



int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port);
@@ -304,6 +307,10 @@ int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip, 
			     struct mv88e6xxx_vtu_entry *entry);

int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,

			       struct mv88e6xxx_vtu_entry *entry);

int mv88e6250_g1_vtu_getnext(struct mv88e6xxx_chip *chip,

			     struct mv88e6xxx_vtu_entry *entry);

int mv88e6250_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,

			       struct mv88e6xxx_vtu_entry *entry);

int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip,

			     struct mv88e6xxx_vtu_entry *entry);

int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,

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