drm/amd/powerplay/smu11: disable PLL shutdown when gfxoff enabled (2a8bfa13) · Commits · 戴 / test

MP1 cannot access clock IP during MP1 FW reload, disable PLL shutdown as a workaround. Signed-off-by:

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -383,10 +383,14 @@ static int navi10_append_powerplay_table(struct smu_context *smu)
		/* Mvdd Svi2 Div Ratio Setting */
		smc_pptable->MvddRatio = smc_dpm_table->MvddRatio;

		if (adev->pm.pp_feature & PP_GFXOFF_MASK)
		if (adev->pm.pp_feature & PP_GFXOFF_MASK) {
		(uint64_t )smc_pptable->FeaturesToRun \|= FEATURE_MASK(FEATURE_GFX_SS_BIT)
		\| FEATURE_MASK(FEATURE_GFXOFF_BIT);

		/* TODO: remove it once SMU fw fix it */
		smc_pptable->DebugOverrides \|= DPM_OVERRIDE_DISABLE_DFLL_PLL_SHUTDOWN;
		}

		return 0;
		}