Commit 2a79d868 authored by Yong Zhao's avatar Yong Zhao Committed by Alex Deucher
Browse files

drm/amdgpu: Reorganize amdgpu_gmc_flush_gpu_tlb() for kfd to use 



Add a flush_type parameter to that series of functions.

Signed-off-by: default avatarYong Zhao <Yong.Zhao@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a614aae7

drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c

+2 −2
Original line number Diff line number Diff line
@@ -248,7 +248,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, 
	}

	mb();

	amdgpu_asic_flush_hdp(adev, NULL);

	amdgpu_gmc_flush_gpu_tlb(adev, 0);

	amdgpu_gmc_flush_gpu_tlb(adev, 0, 0);

	return 0;

}
@@ -331,7 +331,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, 


	mb();

	amdgpu_asic_flush_hdp(adev, NULL);

	amdgpu_gmc_flush_gpu_tlb(adev, 0);

	amdgpu_gmc_flush_gpu_tlb(adev, 0, 0);

	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+2 −2
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ struct amdgpu_vmhub { 
struct amdgpu_gmc_funcs {

	/* flush the vm tlb via mmio */

	void (*flush_gpu_tlb)(struct amdgpu_device *adev,

			      uint32_t vmid);

			      uint32_t vmid, uint32_t flush_type);

	/* flush the vm tlb via ring */

	uint64_t (*emit_flush_gpu_tlb)(struct amdgpu_ring *ring, unsigned vmid,

				       uint64_t pd_addr);
@@ -151,7 +151,7 @@ struct amdgpu_gmc { 
	struct amdgpu_xgmi xgmi;

};



#define amdgpu_gmc_flush_gpu_tlb(adev, vmid) (adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid))

#define amdgpu_gmc_flush_gpu_tlb(adev, vmid, type) (adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid), (type))

#define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((r), (vmid), (addr))

#define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping((r), (vmid), (pasid))

#define amdgpu_gmc_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gmc.gmc_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))

drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c

+3 −2
Original line number Diff line number Diff line
@@ -358,7 +358,8 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev) 
	return 0;

}



static void gmc_v6_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid)

static void gmc_v6_0_flush_gpu_tlb(struct amdgpu_device *adev,

				uint32_t vmid, uint32_t flush_type)

{

	WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);

}
@@ -580,7 +581,7 @@ static int gmc_v6_0_gart_enable(struct amdgpu_device *adev) 
	else

		gmc_v6_0_set_fault_enable_default(adev, true);



	gmc_v6_0_flush_gpu_tlb(adev, 0);

	gmc_v6_0_flush_gpu_tlb(adev, 0, 0);

	dev_info(adev->dev, "PCIE GART of %uM enabled (table at 0x%016llX).\n",

		 (unsigned)(adev->gmc.gart_size >> 20),

		 (unsigned long long)table_addr);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

+3 −2
Original line number Diff line number Diff line
@@ -430,7 +430,8 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev) 
 *

 * Flush the TLB for the requested page table (CIK).

 */

static void gmc_v7_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid)

static void gmc_v7_0_flush_gpu_tlb(struct amdgpu_device *adev,

				uint32_t vmid, uint32_t flush_type)

{

	/* bits 0-15 are the VM contexts0-15 */

	WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
@@ -698,7 +699,7 @@ static int gmc_v7_0_gart_enable(struct amdgpu_device *adev) 
		WREG32(mmCHUB_CONTROL, tmp);

	}



	gmc_v7_0_flush_gpu_tlb(adev, 0);

	gmc_v7_0_flush_gpu_tlb(adev, 0, 0);

	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",

		 (unsigned)(adev->gmc.gart_size >> 20),

		 (unsigned long long)table_addr);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -611,7 +611,7 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev) 
 * Flush the TLB for the requested page table (CIK).

 */

static void gmc_v8_0_flush_gpu_tlb(struct amdgpu_device *adev,

					uint32_t vmid)

				uint32_t vmid, uint32_t flush_type)

{

	/* bits 0-15 are the VM contexts0-15 */

	WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid);
@@ -920,7 +920,7 @@ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) 
	else

		gmc_v8_0_set_fault_enable_default(adev, true);



	gmc_v8_0_flush_gpu_tlb(adev, 0);

	gmc_v8_0_flush_gpu_tlb(adev, 0, 0);

	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",

		 (unsigned)(adev->gmc.gart_size >> 20),

		 (unsigned long long)table_addr);

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