Commit 2a434f24 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx into arm/dt 

ARM: lpc32xx: devicetree updates for v5.1

Here are the changes for ARM NXP LPC32xx and ARM NXP LPC18xx/LPC43xx
devicetree files:

* added dts file for MYIR Tech MYD-LPC4357 development board,
* two missing properties are added to LPC32xx keypad controller device
  tree node, this fixes a long-standing problem with its initialization,
* LPC32xx PL11x LCD controller device node got corrected properties,
  which allows to use it with a new PL11x DRM driver,
* output voltage level on one of Phytec phyCORE-LPC3250 fixed regulators
  is corrected, the fix is needed to remove duplicating platform data,
* Phytec phyCORE-LPC3250 board gets a description of a kit LCD panel,
  this completes setup of CLCD device tree node for the board,
* added unit addresses to memory device nodes on EA and Phytec boards,
* fixes of ordinary warnings in dts formatting like leading zeroes,
  unused address and size cell properties and so on.

* tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx

:
  ARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes
  ARM: dts: lpc32xx: ea3250: add unit address to memory device node
  ARM: dts: lpc32xx: phy3250: add unit address to memory device node
  ARM: dts: lpc32xx: phy3250: setup LCD controller to panel interface
  ARM: dts: lpc32xx: phy3250: remove regulators umbrella device node
  ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage
  ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property
  ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant
  ARM: dts: lpc32xx: reparent keypad controller to SIC1
  ARM: dts: lpc32xx: add required clocks property to keypad device node
  ARM: dts: Add DT for MYIR Tech MYD-LPC4357 Development Board
  ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notation
  ARM: dts: lpc435x: remove address and size cells from gpio-keys-polled nodes

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e47d047e 0293adf7

arch/arm/boot/dts/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -315,7 +315,8 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ 
dtb-$(CONFIG_ARCH_LPC18XX) += \

	lpc4337-ciaa.dtb \

	lpc4350-hitex-eval.dtb \

	lpc4357-ea4357-devkit.dtb

	lpc4357-ea4357-devkit.dtb \

	lpc4357-myd-lpc4357.dtb

dtb-$(CONFIG_ARCH_LPC32XX) += \

	lpc3250-ea3250.dtb \

	lpc3250-phy3250.dtb

arch/arm/boot/dts/lpc3250-ea3250.dts

+13 −7
Original line number Diff line number Diff line
@@ -17,64 +17,70 @@ 
/ {

	model = "Embedded Artists LPC3250 board based on NXP LPC3250";

	compatible = "ea,ea3250", "nxp,lpc3250";

	#address-cells = <1>;

	#size-cells = <1>;



	memory {

	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x4000000>;

	};



	gpio_keys {

	gpio-keys {

		compatible = "gpio-keys";

		#address-cells = <1>;

		#size-cells = <0>;

		autorepeat;

		button@21 {



		button {

			label = "Interrupt Key";

			linux,code = <103>;

			gpios = <&gpio 4 1 0>; /* GPI_P3 1 */

		};



		key1 {

			label = "KEY1";

			linux,code = <1>;

			gpios = <&pca9532 0 0>;

		};



		key2 {

			label = "KEY2";

			linux,code = <2>;

			gpios = <&pca9532 1 0>;

		};



		key3 {

			label = "KEY3";

			linux,code = <3>;

			gpios = <&pca9532 2 0>;

		};



		key4 {

			label = "KEY4";

			linux,code = <4>;

			gpios = <&pca9532 3 0>;

		};



		joy0 {

			label = "Joystick Key 0";

			linux,code = <10>;

			gpios = <&gpio 2 0 0>; /* P2.0 */

		};



		joy1 {

			label = "Joystick Key 1";

			linux,code = <11>;

			gpios = <&gpio 2 1 0>; /* P2.1 */

		};



		joy2 {

			label = "Joystick Key 2";

			linux,code = <12>;

			gpios = <&gpio 2 2 0>; /* P2.2 */

		};



		joy3 {

			label = "Joystick Key 3";

			linux,code = <13>;

			gpios = <&gpio 2 3 0>; /* P2.3 */

		};



		joy4 {

			label = "Joystick Key 4";

			linux,code = <14>;

arch/arm/boot/dts/lpc3250-phy3250.dts

+52 −35
Original line number Diff line number Diff line 
/*

 * PHYTEC phyCORE-LPC3250 board

 *

 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>

 * Copyright 2012 Roland Stigge <stigge@antcom.de>

 *

 * The code contained herein is licensed under the GNU General Public
@@ -17,18 +18,40 @@ 
/ {

	model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";

	compatible = "phytec,phy3250", "nxp,lpc3250";

	#address-cells = <1>;

	#size-cells = <1>;



	memory {

	memory@80000000 {

		device_type = "memory";

		reg = <0x80000000 0x4000000>;

	};



	regulators {

		backlight_reg: regulator@0 {

	leds {

		compatible = "gpio-leds";



		led0 { /* red */

			gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */

			default-state = "off";

		};



		led1 { /* green */

			gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */

			linux,default-trigger = "heartbeat";

		};

	};



	panel: panel {

		compatible = "sharp,lq035q7db03";

		power-supply = <&reg_lcd>;



		port {

			panel_input: endpoint {

				remote-endpoint = <&cldc_output>;

			};

		};

	};



	reg_backlight: regulator-backlight {

		compatible = "regulator-fixed";

			regulator-name = "backlight_reg";

		regulator-name = "backlight";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		gpio = <&gpio 5 4 0>;
@@ -36,9 +59,9 @@ 
		regulator-boot-on;

	};



		lcd_reg: regulator@1 {

	reg_lcd: regulator-lcd {

		compatible = "regulator-fixed";

			regulator-name = "lcd_reg";

		regulator-name = "lcd";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		gpio = <&gpio 5 0 0>;
@@ -46,33 +69,27 @@ 
		regulator-boot-on;

	};



		sd_reg: regulator@2 {

	reg_sd: regulator-sd {

		compatible = "regulator-fixed";

			regulator-name = "sd_reg";

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <1800000>;

		regulator-name = "sd";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio 5 5 0>;

		enable-active-high;

		regulator-boot-on;

	};

};



	leds {

		compatible = "gpio-leds";



		led0 { /* red */

			gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */

			default-state = "off";

		};

&clcd {

	max-memory-bandwidth = <18710000>;

	status = "okay";



		led1 { /* green */

			gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */

			linux,default-trigger = "heartbeat";

		};

	port {

		cldc_output: endpoint {

			remote-endpoint = <&panel_input>;

			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;

		};

	};



&clcd {

	status = "okay";

};



&i2c1 {
@@ -130,7 +147,7 @@ 
	cd-gpios = <&gpio 3 1 0>;

	cd-inverted;

	bus-width = <4>;

	vmmc-supply = <&sd_reg>;

	vmmc-supply = <&reg_sd>;

	status = "okay";

};

arch/arm/boot/dts/lpc32xx.dtsi

+15 −13
Original line number Diff line number Diff line
@@ -139,11 +139,11 @@ 
		};



		clcd: clcd@31040000 {

			compatible = "arm,pl110", "arm,primecell";

			compatible = "arm,pl111", "arm,primecell";

			reg = <0x31040000 0x1000>;

			interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clk LPC32XX_CLK_LCD>;

			clock-names = "apb_pclk";

			clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>;

			clock-names = "clcdclk", "apb_pclk";

			status = "disabled";

		};
@@ -230,7 +230,7 @@ 
				status = "disabled";

			};



			i2s1: i2s@2009C000 {

			i2s1: i2s@2009c000 {

				compatible = "nxp,lpc3220-i2s";

				reg = <0x2009C000 0x1000>;

			};
@@ -273,7 +273,7 @@ 
				status = "disabled";

			};



			i2c1: i2c@400A0000 {

			i2c1: i2c@400a0000 {

				compatible = "nxp,pnx-i2c";

				reg = <0x400A0000 0x100>;

				interrupt-parent = <&sic1>;
@@ -284,7 +284,7 @@ 
				clocks = <&clk LPC32XX_CLK_I2C1>;

			};



			i2c2: i2c@400A8000 {

			i2c2: i2c@400a8000 {

				compatible = "nxp,pnx-i2c";

				reg = <0x400A8000 0x100>;

				interrupt-parent = <&sic1>;
@@ -295,7 +295,7 @@ 
				clocks = <&clk LPC32XX_CLK_I2C2>;

			};



			mpwm: mpwm@400E8000 {

			mpwm: mpwm@400e8000 {

				compatible = "nxp,lpc3220-motor-pwm";

				reg = <0x400E8000 0x78>;

				status = "disabled";
@@ -394,7 +394,7 @@ 
				#gpio-cells = <3>; /* bank, pin, flags */

			};



			timer4: timer@4002C000 {

			timer4: timer@4002c000 {

				compatible = "nxp,lpc3220-timer";

				reg = <0x4002C000 0x1000>;

				interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
@@ -412,7 +412,7 @@ 
				status = "disabled";

			};



			watchdog: watchdog@4003C000 {

			watchdog: watchdog@4003c000 {

				compatible = "nxp,pnx4008-wdt";

				reg = <0x4003C000 0x1000>;

				clocks = <&clk LPC32XX_CLK_WDOG>;
@@ -451,7 +451,7 @@ 
				status = "disabled";

			};



			timer1: timer@4004C000 {

			timer1: timer@4004c000 {

				compatible = "nxp,lpc3220-timer";

				reg = <0x4004C000 0x1000>;

				interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
@@ -462,7 +462,9 @@ 
			key: key@40050000 {

				compatible = "nxp,lpc3220-key";

				reg = <0x40050000 0x1000>;

				interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk LPC32XX_CLK_KEY>;

				interrupt-parent = <&sic1>;

				interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;

				status = "disabled";

			};
@@ -475,7 +477,7 @@ 
				status = "disabled";

			};



			pwm1: pwm@4005C000 {

			pwm1: pwm@4005c000 {

				compatible = "nxp,lpc3220-pwm";

				reg = <0x4005C000 0x4>;

				clocks = <&clk LPC32XX_CLK_PWM1>;
@@ -484,7 +486,7 @@ 
				status = "disabled";

			};



			pwm2: pwm@4005C004 {

			pwm2: pwm@4005c004 {

				compatible = "nxp,lpc3220-pwm";

				reg = <0x4005C004 0x4>;

				clocks = <&clk LPC32XX_CLK_PWM2>;

arch/arm/boot/dts/lpc4350-hitex-eval.dts

+0 −2
Original line number Diff line number Diff line
@@ -40,8 +40,6 @@ 


	pca_buttons {

		compatible = "gpio-keys-polled";

		#address-cells = <1>;

		#size-cells = <0>;

		poll-interval = <100>;

		autorepeat;

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