mtd: atmel_nand: use minimum ecc requirements of nand: ecc_{strength,step}_ds (2a3d933a) · Commits · 戴 / test

drivers/mtd/nand/atmel_nand.c

+9 −37

Original line number	Diff line number	Diff line
		@@ -1062,56 +1062,28 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd)
		}

		/*
		* Get ECC requirement in ONFI parameters, returns -1 if ONFI
		* parameters is not supported.
		* return 0 if success to get the ECC requirement.
		*/
		static int get_onfi_ecc_param(struct nand_chip *chip,
		int ecc_bits, int sector_size)
		{
		ecc_bits = sector_size = 0;

		if (chip->onfi_params.ecc_bits == 0xff)
		/* TODO: the sector_size and ecc_bits need to be find in
		* extended ecc parameter, currently we don't support it.
		*/
		return -1;

		*ecc_bits = chip->onfi_params.ecc_bits;

		/* The default sector size (ecc codeword size) is 512 */
		*sector_size = 512;

		return 0;
		}

		/*
		* Get ecc requirement from ONFI parameters ecc requirement.
		* Get minimum ecc requirements from NAND.
		* If pmecc-cap, pmecc-sector-size in DTS are not specified, this function
		* will set them according to ONFI ecc requirement. Otherwise, use the
		* will set them according to minimum ecc requirement. Otherwise, use the
		* value in DTS file.
		* return 0 if success. otherwise return error code.
		*/
		static int pmecc_choose_ecc(struct atmel_nand_host *host,
		int cap, int sector_size)
		{
		/* Get ECC requirement from ONFI parameters */
		cap = sector_size = 0;
		if (host->nand_chip.onfi_version) {
		if (!get_onfi_ecc_param(&host->nand_chip, cap, sector_size))
		dev_info(host->dev, "ONFI params, minimum required ECC: %d bits in %d bytes\n",
		/* Get minimum ECC requirements */
		if (host->nand_chip.ecc_strength_ds) {
		*cap = host->nand_chip.ecc_strength_ds;
		*sector_size = host->nand_chip.ecc_step_ds;
		dev_info(host->dev, "minimum ECC: %d bits in %d bytes\n",
		cap, sector_size);
		else
		dev_info(host->dev, "NAND chip ECC reqirement is in Extended ONFI parameter, we don't support yet.\n");
		} else {
		dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes");
		}
		if (cap == 0 && sector_size == 0) {
		*cap = 2;
		*sector_size = 512;
		dev_info(host->dev, "can't detect min. ECC, assume 2 bits in 512 bytes\n");
		}

		/* If dts file doesn't specify then use the one in ONFI parameters */
		/* If device tree doesn't specify, use NAND's minimum ECC parameters */
		if (host->pmecc_corr_cap == 0) {
		/* use the most fitable ecc bits (the near bigger one ) */
		if (*cap <= 2)

Admin message