Commit 2a11df6e authored by Wey-Yi Guy's avatar Wey-Yi Guy Committed by John W. Linville
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iwlwifi: software w/a for h/w bug cause Rx bit get clear



This is a w/a for a hardware bug. the h/w bug may cause the Rx bit
(bit 15 before shifting it to 31) to clear when using interrupt coalescing.

This does not mean frames are lost - their processing is just delayed until
next interrupt arrives.

Signed-off-by: default avatarWey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 2be76703
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+10 −0
Original line number Diff line number Diff line
@@ -1803,6 +1803,16 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
	if (val == 0xffffffff)
		val = 0;

	/*
	 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
	 * (bit 15 before shifting it to 31) to clear when using interrupt
	 * coalescing. fortunately, bits 18 and 19 stay set when this happens
	 * so we use them to decide on the real state of the Rx bit.
	 * In order words, bit 15 is set if bit 18 or bit 19 are set.
	 */
	if (val & 0xC0000)
		val |= 0x8000;

	inta = (0xff & val) | ((0xff00 & val) << 16);
	IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
			inta, inta_mask, val);