Commit 29dd5975 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz
Browse files

ide: remove ide_setup_ports() 



ide-cris.c:
* Add cris_setup_ports() helper and use it instead of ide_setup_ports()
  (fixes random value being set in ->io_ports[IDE_IRQ_OFFSET]).

buddha.c:
* Add buddha_setup_ports() helper and use it instead of ide_setup_ports().

falconide.c:
* Add falconide_setup_ports() helper and use it instead of ide_setup_ports(),
  also fix return value of falconide_init() while at it.

gayle.c:
* Add gayle_setup_ports() helper and use it instead of ide_setup_ports().

macide.c:
* Add macide_setup_ports() helper and use it instead of ide_setup_ports()
  (fixes incorrect value being set in ->io_ports[IDE_IRQ_OFFSET]).

q40ide.c:
* Fix q40_ide_setup_ports() comments.

ide.c:
* Remove no longer needed ide_setup_ports().

Cc: Mikael Starvik <starvik@axis.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent f2694b7e

drivers/ide/cris/ide-cris.c

+22 −11
Original line number Diff line number Diff line
@@ -753,6 +753,25 @@ static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed) 
		cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);

}



static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base)

{

	int i;



	memset(hw, 0, sizeof(*hw));



	for (i = 0; i <= 7; i++)

		hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1);



	/*

	 * the IDE control register is at ATA address 6,

	 * with CS1 active instead of CS0

	 */

	hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0);



	hw->irq = ide_default_irq(0);

	hw->ack_intr = cris_ide_ack_intr;

}



static const struct ide_port_info cris_port_info __initdata = {

	.chipset		= ide_etrax100,

	.host_flags		= IDE_HFLAG_NO_ATAPI_DMA |
@@ -765,24 +784,16 @@ static const struct ide_port_info cris_port_info __initdata = { 
static int __init init_e100_ide(void)

{

	hw_regs_t hw;

	int ide_offsets[IDE_NR_PORTS], h, i;

	int h;

	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };



	printk("ide: ETRAX FS built-in ATA DMA controller\n");



	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)

		ide_offsets[i] = cris_ide_reg_addr(i, 0, 1);



	/* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */

	ide_offsets[IDE_CONTROL_OFFSET] = cris_ide_reg_addr(6, 1, 0);



	for (h = 0; h < 4; h++) {

		ide_hwif_t *hwif = NULL;



		ide_setup_ports(&hw, cris_ide_base_address(h),

		                ide_offsets,

		                0, 0, cris_ide_ack_intr,

		                ide_default_irq(0));

		cris_setup_ports(&hw, cris_ide_base_address(h));



		hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);

		if (hwif == NULL)

			continue;

drivers/ide/ide.c

+0 −54
Original line number Diff line number Diff line
@@ -618,60 +618,6 @@ abort: 


EXPORT_SYMBOL(ide_unregister);





/**

 *	ide_setup_ports 	-	set up IDE interface ports

 *	@hw: register descriptions

 *	@base: base register

 *	@offsets: table of register offsets

 *	@ctrl: control register

 *	@ack_irq: IRQ ack

 *	@irq: interrupt lie

 *

 *	Setup hw_regs_t structure described by parameters.  You

 *	may set up the hw structure yourself OR use this routine to

 *	do it for you. This is basically a helper

 *

 */

 

void ide_setup_ports (	hw_regs_t *hw,

			unsigned long base, int *offsets,

			unsigned long ctrl, unsigned long intr,

			ide_ack_intr_t *ack_intr,

/*

 *			ide_io_ops_t *iops,

 */

			int irq)

{

	int i;



	memset(hw, 0, sizeof(hw_regs_t));

	for (i = 0; i < IDE_NR_PORTS; i++) {

		if (offsets[i] == -1) {

			switch(i) {

				case IDE_CONTROL_OFFSET:

					hw->io_ports[i] = ctrl;

					break;

#if defined(CONFIG_AMIGA) || defined(CONFIG_MAC)

				case IDE_IRQ_OFFSET:

					hw->io_ports[i] = intr;

					break;

#endif /* (CONFIG_AMIGA) || (CONFIG_MAC) */

				default:

					hw->io_ports[i] = 0;

					break;

			}

		} else {

			hw->io_ports[i] = base + offsets[i];

		}

	}

	hw->irq = irq;

	hw->ack_intr = ack_intr;

/*

 *	hw->iops = iops;

 */

}



void ide_init_port_hw(ide_hwif_t *hwif, hw_regs_t *hw)

{

	memcpy(hwif->io_ports, hw->io_ports, sizeof(hwif->io_ports));

drivers/ide/legacy/buddha.c

+37 −35
Original line number Diff line number Diff line
@@ -56,31 +56,11 @@ static u_int xsurf_bases[XSURF_NUM_HWIFS] __initdata = { 
     XSURF_BASE1, XSURF_BASE2

};





    /*

     *  Offsets from one of the above bases

     */



#define BUDDHA_DATA	0x00

#define BUDDHA_ERROR	0x06		/* see err-bits */

#define BUDDHA_NSECTOR	0x0a		/* nr of sectors to read/write */

#define BUDDHA_SECTOR	0x0e		/* starting sector */

#define BUDDHA_LCYL	0x12		/* starting cylinder */

#define BUDDHA_HCYL	0x16		/* high byte of starting cyl */

#define BUDDHA_SELECT	0x1a		/* 101dhhhh , d=drive, hhhh=head */

#define BUDDHA_STATUS	0x1e		/* see status-bits */

#define BUDDHA_CONTROL	0x11a

#define XSURF_CONTROL   -1              /* X-Surf has no CS1* (Control/AltStat) */



static int buddha_offsets[IDE_NR_PORTS] __initdata = {

    BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,

    BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, BUDDHA_CONTROL, -1

};



static int xsurf_offsets[IDE_NR_PORTS] __initdata = {

    BUDDHA_DATA, BUDDHA_ERROR, BUDDHA_NSECTOR, BUDDHA_SECTOR, BUDDHA_LCYL,

    BUDDHA_HCYL, BUDDHA_SELECT, BUDDHA_STATUS, XSURF_CONTROL, -1

};



    /*

     *  Other registers
@@ -140,6 +120,26 @@ static int xsurf_ack_intr(ide_hwif_t *hwif) 
    return 1;

}



static void __init buddha_setup_ports(hw_regs_t *hw, unsigned long base,

				      unsigned long ctl, unsigned long irq_port,

				      ide_ack_intr_t *ack_intr)

{

	int i;



	memset(hw, 0, sizeof(*hw));



	hw->io_ports[IDE_DATA_OFFSET] = base;



	for (i = 1; i < 8; i++)

		hw->io_ports[i] = base + 2 + i * 4;



	hw->io_ports[IDE_CONTROL_OFFSET] = ctl;

	hw->io_ports[IDE_IRQ_OFFSET] = irq_port;



	hw->irq = IRQ_AMIGA_PORTS;

	hw->ack_intr = ack_intr;

}



    /*

     *  Probe for a Buddha or Catweasel IDE interface

     */
@@ -203,22 +203,24 @@ fail_base2: 
				 buddha_board_name[type]);



		for (i = 0; i < buddha_num_hwifs; i++) {

			unsigned long base, ctl, irq_port;

			ide_ack_intr_t *ack_intr;



			if (type != BOARD_XSURF) {

				ide_setup_ports(&hw, (buddha_board+buddha_bases[i]),

						buddha_offsets, 0,

						(buddha_board+buddha_irqports[i]),

						buddha_ack_intr,

//						budda_iops,

						IRQ_AMIGA_PORTS);

				base = buddha_board + buddha_bases[i];

				ctl = base + BUDDHA_CONTROL;

				irq_port = buddha_board + buddha_irqports[i];

				ack_intr = buddha_ack_intr;

			} else {

				ide_setup_ports(&hw, (buddha_board+xsurf_bases[i]),

						xsurf_offsets, 0,

						(buddha_board+xsurf_irqports[i]),

						xsurf_ack_intr,

//						xsurf_iops,

						IRQ_AMIGA_PORTS);

				base = buddha_board + xsurf_bases[i];

				/* X-Surf has no CS1* (Control/AltStat) */

				ctl = 0;

				irq_port = buddha_board + xsurf_irqports[i];

				ack_intr = xsurf_ack_intr;

			}



			buddha_setup_ports(&hw, base, ctl, irq_port, ack_intr);



			hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);

			if (hwif) {

				u8 index = hwif->index;

drivers/ide/legacy/falconide.c

+21 −21
Original line number Diff line number Diff line
@@ -33,22 +33,8 @@ 
     *  Offsets from the above base

     */



#define ATA_HD_DATA	0x00

#define ATA_HD_ERROR	0x05		/* see err-bits */

#define ATA_HD_NSECTOR	0x09		/* nr of sectors to read/write */

#define ATA_HD_SECTOR	0x0d		/* starting sector */

#define ATA_HD_LCYL	0x11		/* starting cylinder */

#define ATA_HD_HCYL	0x15		/* high byte of starting cyl */

#define ATA_HD_SELECT	0x19		/* 101dhhhh , d=drive, hhhh=head */

#define ATA_HD_STATUS	0x1d		/* see status-bits */

#define ATA_HD_CONTROL	0x39



static int falconide_offsets[IDE_NR_PORTS] __initdata = {

    ATA_HD_DATA, ATA_HD_ERROR, ATA_HD_NSECTOR, ATA_HD_SECTOR, ATA_HD_LCYL,

    ATA_HD_HCYL, ATA_HD_SELECT, ATA_HD_STATUS, ATA_HD_CONTROL, -1

};





    /*

     *  falconide_intr_lock is used to obtain access to the IDE interrupt,

     *  which is shared between several drivers.
@@ -57,6 +43,22 @@ static int falconide_offsets[IDE_NR_PORTS] __initdata = { 
int falconide_intr_lock;

EXPORT_SYMBOL(falconide_intr_lock);



static void __init falconide_setup_ports(hw_regs_t *hw)

{

	int i;



	memset(hw, 0, sizeof(*hw));



	hw->io_ports[IDE_DATA_OFFSET] = ATA_HD_BASE;



	for (i = 1; i < 8; i++)

		hw->io_ports[i] = ATA_HD_BASE + 1 + i * 4;



	hw->io_ports[IDE_CONTROL_OFFSET] = ATA_HD_CONTROL;



	hw->irq = IRQ_MFP_IDE;

	hw->ack_intr = NULL;

}



    /*

     *  Probe for a Falcon IDE interface
@@ -64,16 +66,15 @@ EXPORT_SYMBOL(falconide_intr_lock); 


static int __init falconide_init(void)

{

    if (MACH_IS_ATARI && ATARIHW_PRESENT(IDE)) {

	hw_regs_t hw;

	ide_hwif_t *hwif;



	if (!MACH_IS_ATARI || !ATARIHW_PRESENT(IDE))

		return 0;



	printk(KERN_INFO "ide: Falcon IDE controller\n");



	ide_setup_ports(&hw, ATA_HD_BASE, falconide_offsets,

			0, 0, NULL,

//			falconide_iops,

			IRQ_MFP_IDE);

	falconide_setup_ports(&hw);



	hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);

	if (hwif) {
@@ -85,7 +86,6 @@ static int __init falconide_init(void) 


		ide_device_add(idx, NULL);

	}

    }



	return 0;

}

drivers/ide/legacy/gayle.c

+21 −18
Original line number Diff line number Diff line
@@ -34,22 +34,8 @@ 
     *  Offsets from one of the above bases

     */



#define GAYLE_DATA	0x00

#define GAYLE_ERROR	0x06		/* see err-bits */

#define GAYLE_NSECTOR	0x0a		/* nr of sectors to read/write */

#define GAYLE_SECTOR	0x0e		/* starting sector */

#define GAYLE_LCYL	0x12		/* starting cylinder */

#define GAYLE_HCYL	0x16		/* high byte of starting cyl */

#define GAYLE_SELECT	0x1a		/* 101dhhhh , d=drive, hhhh=head */

#define GAYLE_STATUS	0x1e		/* see status-bits */

#define GAYLE_CONTROL	0x101a



static int gayle_offsets[IDE_NR_PORTS] __initdata = {

    GAYLE_DATA, GAYLE_ERROR, GAYLE_NSECTOR, GAYLE_SECTOR, GAYLE_LCYL,

    GAYLE_HCYL, GAYLE_SELECT, GAYLE_STATUS, -1, -1

};





    /*

     *  These are at different offsets from the base

     */
@@ -106,6 +92,26 @@ static int gayle_ack_intr_a1200(ide_hwif_t *hwif) 
    return 1;

}



static void __init gayle_setup_ports(hw_regs_t *hw, unsigned long base,

				     unsigned long ctl, unsigned long irq_port,

				     ide_ack_intr_t *ack_intr);

{

	int i;



	memset(hw, 0, sizeof(*hw));



	hw->io_ports[IDE_DATA_OFFSET] = base;



	for (i = 1; i < 8; i++)

		hw->io_ports[i] = base + 2 + i * 4;



	hw->io_ports[IDE_CONTROL_OFFSET] = ctl;

	hw->io_ports[IDE_IRQ_OFFSET] = irq_port;



	hw->irq = IRQ_AMIGA_PORTS;

	hw->ack_intr = ack_intr;

}



    /*

     *  Probe for a Gayle IDE interface (and optionally for an IDE doubler)

     */
@@ -167,10 +173,7 @@ found: 
	base = (unsigned long)ZTWO_VADDR(phys_base);

	ctrlport = GAYLE_HAS_CONTROL_REG ? (base + GAYLE_CONTROL) : 0;



	ide_setup_ports(&hw, base, gayle_offsets,

			ctrlport, irqport, ack_intr,

//			&gayle_iops,

			IRQ_AMIGA_PORTS);

	gayle_setup_ports(&hw, base, ctrlport, irqport, ack_intr);



	hwif = ide_find_port(base);

	if (hwif) {

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