Commit 2990821d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
  MIPS: Alchemy: Fix reset for MTX-1 and XXS1500
  MIPS: MTX-1: Make au1000_eth probe all PHY addresses
  MIPS: Jz4740: Add HAVE_CLK
  MIPS: Move idle task creation to work queue
  MIPS, Perf-events: Use unsigned delta for right shift in event update
  MIPS, Perf-events: Work with the new callchain interface
  MIPS, Perf-events: Fix event check in validate_event()
  MIPS, Perf-events: Work with the new PMU interface
  MIPS, Perf-events: Work with irq_work
  MIPS: Fix always CONFIG_LOONGSON_UART_BASE=y
  MIPS: Loongson: Fix potentially wrong string handling
  MIPS: Fix GCC-4.6 'set but not used' warning in arch/mips/mm/init.c
  MIPS: Fix GCC-4.6 'set but not used' warning in ieee754int.h
  MIPS: Remove unused code from arch/mips/kernel/syscall.c
  MIPS: Fix GCC-4.6 'set but not used' warning in signal*.c
  MIPS: MSP: Fix MSP71xx bpci interrupt handler return value
  MIPS: Select R4K timer lib for all MSP platforms
  MIPS: Loongson: Remove ad-hoc cmdline default
  MIPS: Clear the correct flag in sysmips(MIPS_FIXADE, ...).
  MIPS: Add an unreachable return statement to satisfy buggy GCCs.
  ...
parents 869c34f5 9ced9757

arch/mips/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ config MIPS 
	select HAVE_GENERIC_DMA_COHERENT

	select HAVE_IDE

	select HAVE_OPROFILE

	select HAVE_IRQ_WORK

	select HAVE_PERF_EVENTS

	select PERF_USE_VMALLOC

	select HAVE_ARCH_KGDB
@@ -208,6 +209,7 @@ config MACH_JZ4740 
	select ARCH_REQUIRE_GPIOLIB

	select SYS_HAS_EARLY_PRINTK

	select HAVE_PWM

	select HAVE_CLK



config LASAT

	bool "LASAT Networks platforms"
@@ -333,6 +335,8 @@ config PNX8550_STB810 
config PMC_MSP

	bool "PMC-Sierra MSP chipsets"

	depends on EXPERIMENTAL

	select CEVT_R4K

	select CSRC_R4K

	select DMA_NONCOHERENT

	select SWAP_IO_SPACE

	select NO_EXCEPT_FILL

arch/mips/alchemy/mtx-1/board_setup.c

+2 −2
Original line number Diff line number Diff line
@@ -54,8 +54,8 @@ int mtx1_pci_idsel(unsigned int devsel, int assert); 


static void mtx1_reset(char *c)

{

	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */

	au_writel(0x00000000, 0xAE00001C);

	/* Jump to the reset vector */

	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));

}



static void mtx1_power_off(void)

arch/mips/alchemy/mtx-1/platform.c

+9 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@ 
#include <linux/mtd/physmap.h>

#include <mtd/mtd-abi.h>



#include <asm/mach-au1x00/au1xxx_eth.h>



static struct gpio_keys_button mtx1_gpio_button[] = {

	{

		.gpio = 207,
@@ -140,10 +142,17 @@ static struct __initdata platform_device * mtx1_devs[] = { 
	&mtx1_mtd,

};



static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {

	.phy_search_highest_addr	= 1,

	.phy1_search_mac0 		= 1,

};



static int __init mtx1_register_devices(void)

{

	int rc;



	au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);



	rc = gpio_request(mtx1_gpio_button[0].gpio,

					mtx1_gpio_button[0].desc);

	if (rc < 0) {

arch/mips/alchemy/xxs1500/board_setup.c

+2 −2
Original line number Diff line number Diff line
@@ -36,8 +36,8 @@ 


static void xxs1500_reset(char *c)

{

	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */

	au_writel(0x00000000, 0xAE00001C);

	/* Jump to the reset vector */

	__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));

}



static void xxs1500_power_off(void)

arch/mips/include/asm/perf_event.h

+1 −11
Original line number Diff line number Diff line
@@ -11,15 +11,5 @@ 


#ifndef __MIPS_PERF_EVENT_H__

#define __MIPS_PERF_EVENT_H__



/*

 * MIPS performance counters do not raise NMI upon overflow, a regular

 * interrupt will be signaled. Hence we can do the pending perf event

 * work at the tail of the irq handler.

 */

static inline void

set_perf_event_pending(void)

{

}



/* Leave it empty here. The file is required by linux/perf_event.h */

#endif /* __MIPS_PERF_EVENT_H__ */

CRA Git | Maintained and supported by SUSTech CRA and CCSE