Commit 298c48a8 authored by Srinivas KANDAGATLA's avatar Srinivas KANDAGATLA Committed by Paul Mundt
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sh: fix wrong icache/dcache address-array start addr in cache-debugfs. 



This patch fixes a icache/dcache address-array start address while
dumping its entires in debugfs. Perviously the code was attempting to
remember the address in static variable, which is no more required
for debugfs, as the function can be executed in one pass.

Without this patch the start address ends up in wrong place and the
/sys/kernel/debug/sh/icache or dcache debugfs contents may not be correct.

Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@st.com>
Cc: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 0792644d

arch/sh/mm/cache-debugfs.c

+5 −20
Original line number Diff line number Diff line
@@ -26,9 +26,9 @@ static int cache_seq_show(struct seq_file *file, void *iter) 
{

	unsigned int cache_type = (unsigned int)file->private;

	struct cache_info *cache;

	unsigned int waysize, way, cache_size;

	unsigned long ccr, base;

	static unsigned long addrstart = 0;

	unsigned int waysize, way;

	unsigned long ccr;

	unsigned long addrstart = 0;



	/*

	 * Go uncached immediately so we don't skew the results any
@@ -45,28 +45,13 @@ static int cache_seq_show(struct seq_file *file, void *iter) 
	}



	if (cache_type == CACHE_TYPE_DCACHE) {

		base = CACHE_OC_ADDRESS_ARRAY;

		addrstart = CACHE_OC_ADDRESS_ARRAY;

		cache = &current_cpu_data.dcache;

	} else {

		base = CACHE_IC_ADDRESS_ARRAY;

		addrstart = CACHE_IC_ADDRESS_ARRAY;

		cache = &current_cpu_data.icache;

	}



	/*

	 * Due to the amount of data written out (depending on the cache size),

	 * we may be iterated over multiple times. In this case, keep track of

	 * the entry position in addrstart, and rewind it when we've hit the

	 * end of the cache.

	 *

	 * Likewise, the same code is used for multiple caches, so care must

	 * be taken for bouncing addrstart back and forth so the appropriate

	 * cache is hit.

	 */

	cache_size = cache->ways * cache->sets * cache->linesz;

	if (((addrstart & 0xff000000) != base) ||

	     (addrstart & 0x00ffffff) > cache_size)

		addrstart = base;



	waysize = cache->sets;



	/*

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