Commit 2958b1ec authored by Jean Delvare's avatar Jean Delvare
Browse files

hwmon: PCI quirk for hwmon access on MSI MS-7031 board 



The MSI MS-7031 is based on an ATI IXP300 south bridge. On this south
bridge, accessible I/O ports must be enabled explicitly. Unfortunately
the BIOS forgets to enable access to the hardware monitoring chip I/O
ports, so hardware monitoring fails.

Add a quirk enabling access to the required ports (0x295-0x296). This
is exactly what MSI's own hardware monitoring application is doing, so
it has to be the right way.

Signed-off-by: default avatarJean Delvare <khali@linux-fr.org>
parent c1e48dce

drivers/hwmon/hwmon.c

+29 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#include <linux/hwmon.h>

#include <linux/gfp.h>

#include <linux/spinlock.h>

#include <linux/pci.h>



#define HWMON_ID_PREFIX "hwmon"

#define HWMON_ID_FORMAT HWMON_ID_PREFIX "%d"
@@ -86,8 +87,36 @@ void hwmon_device_unregister(struct device *dev) 
			"hwmon_device_unregister() failed: bad class ID!\n");

}



static void __init hwmon_pci_quirks(void)

{

#if defined CONFIG_X86 && defined CONFIG_PCI

	struct pci_dev *sb;

	u16 base;

	u8 enable;



	/* Open access to 0x295-0x296 on MSI MS-7031 */

	sb = pci_get_device(PCI_VENDOR_ID_ATI, 0x436c, NULL);

	if (sb &&

	    (sb->subsystem_vendor == 0x1462 &&	/* MSI */

	     sb->subsystem_device == 0x0031)) {	/* MS-7031 */



		pci_read_config_byte(sb, 0x48, &enable);

		pci_read_config_word(sb, 0x64, &base);



		if (base == 0 && !(enable & BIT(2))) {

			dev_info(&sb->dev,

				 "Opening wide generic port at 0x295\n");

			pci_write_config_word(sb, 0x64, 0x295);

			pci_write_config_byte(sb, 0x48, enable | BIT(2));

		}

	}

#endif

}



static int __init hwmon_init(void)

{

	hwmon_pci_quirks();



	hwmon_class = class_create(THIS_MODULE, "hwmon");

	if (IS_ERR(hwmon_class)) {

		printk(KERN_ERR "hwmon.c: couldn't create sysfs class\n");

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