Commit 292cc1af authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'sunxi-dt-for-4.9-2' of... 

Merge tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/late

Merge "Allwinner DT changes for 4.9, take 2" from Maxime Ripard:

A second set of device tree changes, this time switching a few SoCs to the
new sunxi-ng clock framework. We also added the support for a new SoC
(NextThing GR8 and its evaluation board), and the support for the DRM
driver in the A33.

To maintain bisectability, while avoiding some un-trivial merge
conflicts, I had to merge the clk branch that I've sent a PR to Mike
and Stephen. This branch will of course be stable.

* tag 'sunxi-dt-for-4.9-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (53 commits)
  ARM: dts: gr8: Add support for the GR8 evaluation board
  ARM: dts: Add NextThing GR8 dtsi
  ARM: dts: sun8i: Move A23/A33 usbphy and usb_otg nodes to common dtsi
  ARM: sun8i: a23/a33: Add RGB666 pins
  ARM: sun8i: a33: Add display pipeline
  ARM: sun8i: Convert the A23 and A33 to the CCU
  ARM: dts: sun6i: switch A31/A31s to new CCU clock bindings
  clk: sunxi-ng: Add hardware dependency
  clk: sunxi-ng: Add A23 CCU
  clk: sunxi-ng: Add A33 CCU support
  clk: sunxi-ng: Add N-class clocks support
  clk: sunxi-ng: mux: Add mux table macro
  clk: sunxi-ng: div: Allow to set a maximum
  clk: sunxi-ng: div: Add kerneldoc for the _ccu_div structure
  clk: sunxi-ng: div: Add mux table macros
  devicetree: Add vendor prefix for FriendlyARM
  ARM: dts: sun8i: Add dts file for the NanoPi NEO SBC
  ARM: dts: sun8i-q8-common: Add support for SDIO wifi controllers
  ARM: dts: sun8i: Add dts file for the Orange Pi Plus2E SBC
  ARM: dts: sun8i: Orange Pi Plus dts is for the Plus and Plus 2
  ...
parents 3eab887a 7a988a4d

Documentation/devicetree/bindings/clock/sunxi-ccu.txt

+4 −1
Original line number Diff line number Diff line
@@ -2,7 +2,10 @@ Allwinner Clock Control Unit Binding 
------------------------------------



Required properties :

- compatible: must contain one of the following compatible:

- compatible: must contain one of the following compatibles:

		- "allwinner,sun6i-a31-ccu"

		- "allwinner,sun8i-a23-ccu"

		- "allwinner,sun8i-a33-ccu"

		- "allwinner,sun8i-h3-ccu"



- reg: Must contain the registers base address and length

Documentation/devicetree/bindings/vendor-prefixes.txt

+1 −0
Original line number Diff line number Diff line
@@ -98,6 +98,7 @@ ezchip EZchip Semiconductor 
fcs	Fairchild Semiconductor

firefly	Firefly

focaltech	FocalTech Systems Co.,Ltd

friendlyarm	Guangzhou FriendlyARM Computer Tech Co., Ltd

fsl	Freescale Semiconductor

ge	General Electric Company

geekbuying	GeekBuying

arch/arm/boot/dts/Makefile

+9 −0
Original line number Diff line number Diff line
@@ -719,6 +719,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ 
	sun4i-a10-pcduino2.dtb \

	sun4i-a10-pov-protab2-ips9.dtb

dtb-$(CONFIG_MACH_SUN5I) += \

	ntc-gr8-evb.dtb \

	sun5i-a10s-auxtek-t003.dtb \

	sun5i-a10s-auxtek-t004.dtb \

	sun5i-a10s-mk802.dtb \
@@ -727,6 +728,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \ 
	sun5i-a10s-wobo-i5.dtb \

	sun5i-a13-difrnce-dit4350.dtb \

	sun5i-a13-empire-electronix-d709.dtb \

	sun5i-a13-empire-electronix-m712.dtb \

	sun5i-a13-hsg-h702.dtb \

	sun5i-a13-inet-98v-rev2.dtb \

	sun5i-a13-olinuxino.dtb \
@@ -743,6 +745,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ 
	sun6i-a31-mele-a1000g-quad.dtb \

	sun6i-a31s-colorfly-e708-q1.dtb \

	sun6i-a31s-cs908.dtb \

	sun6i-a31s-inet-q972.dtb \

	sun6i-a31s-primo81.dtb \

	sun6i-a31s-sina31s.dtb \

	sun6i-a31s-sinovoip-bpi-m2.dtb \
@@ -782,16 +785,22 @@ dtb-$(CONFIG_MACH_SUN8I) += \ 
	sun8i-a23-q8-tablet.dtb \

	sun8i-a33-et-q8-v1.6.dtb \

	sun8i-a33-ga10h-v1.1.dtb \

	sun8i-a33-inet-d978-rev2.dtb \

	sun8i-a33-ippo-q8h-v1.2.dtb \

	sun8i-a33-olinuxino.dtb \

	sun8i-a33-q8-tablet.dtb \

	sun8i-a33-sinlinx-sina33.dtb \

	sun8i-a83t-allwinner-h8homlet-v2.dtb \

	sun8i-a83t-cubietruck-plus.dtb \

	sun8i-h3-bananapi-m2-plus.dtb \

	sun8i-h3-nanopi-neo.dtb \

	sun8i-h3-orangepi-2.dtb \

	sun8i-h3-orangepi-lite.dtb \

	sun8i-h3-orangepi-one.dtb \

	sun8i-h3-orangepi-pc.dtb \

	sun8i-h3-orangepi-pc-plus.dtb \

	sun8i-h3-orangepi-plus.dtb \

	sun8i-h3-orangepi-plus2e.dtb \

	sun8i-r16-parrot.dtb

dtb-$(CONFIG_MACH_SUN9I) += \

	sun9i-a80-optimus.dtb \

arch/arm/boot/dts/axp209.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -53,6 +53,12 @@ 
	interrupt-controller;

	#interrupt-cells = <1>;



	axp_gpio: gpio {

		compatible = "x-powers,axp209-gpio";

		gpio-controller;

		#gpio-cells = <2>;

	};



	regulators {

		/* Default work frequency for buck regulators */

		x-powers,dcdc-freq = <1500>;

arch/arm/boot/dts/ntc-gr8-evb.dts

0 → 100644
+342 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2016 Free Electrons

 * Copyright 2016 NextThing Co

 *

 * Mylène Josserand <mylene.josserand@free-electrons.com>

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;

#include "ntc-gr8.dtsi"

#include "sunxi-common-regulators.dtsi"



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {

	model = "NextThing GR8-EVB";

	compatible = "nextthing,gr8-evb", "nextthing,gr8";



	aliases {

		i2c0 = &i2c0;

		i2c1 = &i2c1;

		i2c2 = &i2c2;

		serial0 = &uart1;

		serial1 = &uart2;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	backlight: backlight {

		compatible = "pwm-backlight";

		pwms = <&pwm 0 10000 0>;

		enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;



		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;

		default-brightness-level = <8>;

	};

};



&be0 {

	status = "okay";

};



&codec {

	status = "okay";

};



&ehci0 {

	status = "okay";

};



&i2c0 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c0_pins_a>;

	status = "okay";



	axp209: pmic@34 {

		reg = <0x34>;



		/*

		* The interrupt is routed through the "External Fast

		* Interrupt Request" pin (ball G13 of the module)

		* directly to the main interrupt controller, without

		* any other controller interfering.

		*/

		interrupts = <0>;

	};

};



#include "axp209.dtsi"



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c1_pins_a>;

	status = "okay";



	wm8978: codec@1a {

		#sound-dai-cells = <0>;

		compatible = "wlf,wm8978";

		reg = <0x1a>;

	};



	pcf8563: rtc@51 {

		compatible = "phg,pcf8563";

		reg = <0x51>;

	};

};



&i2c2 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2c2_pins_a>;

	status = "okay";

};



&i2s0 {

	pinctrl-names = "default";

	pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;

	status = "okay";

};



&ir0 {

	pinctrl-names = "default";

	pinctrl-0 = <&ir0_rx_pins_a>;

	status = "okay";

};



&lradc {

	vref-supply = <&reg_ldo2>;

	status = "okay";



	button@190 {

		label = "Volume Up";

		linux,code = <KEY_VOLUMEUP>;

		channel = <0>;

		voltage = <190000>;

	};



	button@390 {

		label = "Volume Down";

		linux,code = <KEY_VOLUMEDOWN>;

		channel = <0>;

		voltage = <390000>;

	};



	button@600 {

		label = "Menu";

		linux,code = <KEY_MENU>;

		channel = <0>;

		voltage = <600000>;

	};



	button@800 {

		label = "Search";

		linux,code = <KEY_SEARCH>;

		channel = <0>;

		voltage = <800000>;

	};



	button@980 {

		label = "Home";

		linux,code = <KEY_HOMEPAGE>;

		channel = <0>;

		voltage = <980000>;

	};



	button@1180 {

		label = "Esc";

		linux,code = <KEY_ESC>;

		channel = <0>;

		voltage = <1180000>;

	};



	button@1400 {

		label = "Enter";

		linux,code = <KEY_ENTER>;

		channel = <0>;

		voltage = <1400000>;

	};

};



&mmc0 {

	pinctrl-names = "default";

	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_gr8_evb>;

	vmmc-supply = <&reg_vcc3v3>;

	bus-width = <4>;

	cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */

	cd-inverted;

	status = "okay";

};



&nfc {

	pinctrl-names = "default";

	pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;



	/* MLC Support sucks for now */

	status = "disabled";

};



&ohci0 {

	status = "okay";

};



&otg_sram {

	status = "okay";

};



&pio {

	mmc0_cd_pin_gr8_evb: mmc0-cd-pin@0 {

		allwinner,pins = "PG0";

		allwinner,function = "gpio_in";

		allwinner,drive = <SUN4I_PINCTRL_10_MA>;

		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

	};



	usb0_id_pin_gr8_evb: usb0-id-pin@0 {

		allwinner,pins = "PG2";

		allwinner,function = "gpio_in";

		allwinner,drive = <SUN4I_PINCTRL_10_MA>;

		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

	};



	usb0_vbus_det_pin_gr8_evb: usb0-vbus-det-pin@0 {

		allwinner,pins = "PG1";

		allwinner,function = "gpio_in";

		allwinner,drive = <SUN4I_PINCTRL_10_MA>;

		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

	};



	usb1_vbus_pin_gr8_evb: usb1-vbus-pin@0 {

		allwinner,pins = "PG13";

		allwinner,function = "gpio_out";

		allwinner,drive = <SUN4I_PINCTRL_10_MA>;

		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

	};

};



&pwm {

	pinctrl-names = "default";

	pinctrl-0 = <&pwm0_pins_a>;

	status = "okay";

};



&reg_dcdc2 {

	regulator-min-microvolt = <1000000>;

	regulator-max-microvolt = <1400000>;

	regulator-name = "vdd-cpu";

	regulator-always-on;

};



&reg_dcdc3 {

	regulator-min-microvolt = <1000000>;

	regulator-max-microvolt = <1300000>;

	regulator-name = "vdd-sys";

	regulator-always-on;

};



&reg_ldo1 {

	regulator-name = "vdd-rtc";

};



&reg_ldo2 {

	regulator-min-microvolt = <2700000>;

	regulator-max-microvolt = <3300000>;

	regulator-name = "avcc";

	regulator-always-on;

};



&reg_usb1_vbus {

	pinctrl-0 = <&usb1_vbus_pin_gr8_evb>;

	gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;

	status = "okay";

};



&rtp {

	allwinner,ts-attached;

};



&spdif {

	pinctrl-names = "default";

	pinctrl-0 = <&spdif_tx_pins_a>;

	status = "okay";

};



&tve0 {

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;

	status = "okay";

};



&usb_otg {

	/*

	 * The GR8-EVB has a somewhat interesting design. There's a

	 * pin supposed to control VBUS, an ID pin, a VBUS detect pin,

	 * so everything should work just fine.

	 *

	 * Except that the pin supposed to control VBUS is not

	 * connected to any controllable output, neither to the SoC

	 * through a GPIO or to the PMIC, and it is pulled down,

	 * meaning that we will never be able to enable VBUS on this

	 * board.

	 */

	dr_mode = "otg";

	status = "okay";

};



&usb_power_supply {

	status = "okay";

};



&usbphy {

	pinctrl-names = "default";

	pinctrl-0 = <&usb0_id_pin_gr8_evb>, <&usb0_vbus_det_pin_gr8_evb>;

	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */

	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */

	usb0_vbus_power-supply = <&usb_power_supply>;

	usb1_vbus-supply = <&reg_usb1_vbus>;

	status = "okay";

};

CRA Git | Maintained and supported by SUSTech CRA and CCSE