Commit 291e287b authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v4.9-rockchip-dts64-1' of... 

Merge tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Pull "Rockchip dts64 changes for 4.9" from Heiko Stübner:

64bit Rockchip devicetree changes containing support for the recently
added firmware reboot-flag support, one new board the Tronsmart Orion
based on the rk3368 and a large number of newly supported peripherals
for the rk3399 (type-c phy, usb2 phy, pcie controller and pcie phy,
gmac, arm-pmu using ppi partitioning, efuse, saradc) as well as some
smaller housekeeping and non-critical fixes.

* tag 'v4.9-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (22 commits)
  arm64: dts: rockchip: add Type-C phy for RK3399
  arm64: dts: rockchip: enable the gmac for rk3399 evb board
  arm64: dts: rockchip: add the gmac needed node for rk3399
  arm64: dts: rockchip: support the pmu node for rk3399
  arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs
  arm64: dts: rockchip: add the tcpc for rk3399 power domain
  arm64: dts: rockchip: add efuse0 device node for rk3399
  arm64: dts: rockchip: configure PCIe support for rk3399-evb
  arm64: dts: rockchip: add the PCIe controller support for RK3399
  arm64: dts: rockchip: add the PCIe PHY for RK3399
  arm64: dts: rockchip: add the gmac power domain on rk3399
  arm64: dts: rockchip: Add pinctrl entry for 32k clock on rk3399
  arm64: dts: rockchip: set to CCI clock of RK3399 to 600M
  arm64: dts: rockchip: fix the address map for WDT0 and WDT1
  arm64: dts: rockchip: add the saradc for rk3399
  arm64: dts: rockchip: configure usb2-phy support for rk3399-evb
  arm64: dts: rockchip: add usb2-phy support for rk3399
  arm64: dts: rockchip: add syscon-reboot-mode DT node
  soc: rockchip: add reboot-mode header
  arm64: dts: rockchip: remove broken-cd from sdio0
  ...
parents 3073be6c f606193a

Documentation/devicetree/bindings/arm/rockchip.txt

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Original line number Diff line number Diff line
@@ -113,3 +113,7 @@ Rockchip platforms device tree bindings 
- Rockchip RK3399 evb:

    Required root node properties:

      - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";



- Tronsmart Orion R68 Meta

    Required root node properties:

      - compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";

arch/arm64/boot/dts/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb

arch/arm64/boot/dts/rockchip/rk3368-orion-r68-meta.dts

0 → 100644
+382 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2016 Matthias Brugger <mbrugger@suse.com>

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License as

 *     published by the Free Software Foundation; either version 2 of the

 *     License, or (at your option) any later version.

 *

 *     This file is distributed in the hope that it will be useful,

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively,

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use,

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */



/dts-v1/;

#include <dt-bindings/input/input.h>

#include "rk3368.dtsi"



/ {

	model = "Rockchip Orion R68";

	compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";



	chosen {

		stdout-path = "serial2:115200n8";

	};



	memory {

		device_type = "memory";

		reg = <0x0 0x0 0x0 0x80000000>;

	};



	emmc_pwrseq: emmc-pwrseq {

		compatible = "mmc-pwrseq-emmc";

		pinctrl-0 = <&emmc_reset>;

		pinctrl-names = "default";

		reset-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;

	};



	ext_gmac: external-gmac-clock {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <125000000>;

		clock-output-names = "ext_gmac";

	};



	keys: gpio-keys {

		compatible = "gpio-keys";

		pinctrl-names = "default";

		pinctrl-0 = <&pwr_key>;



		power {

			wakeup-source;

			gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;

			label = "GPIO Power";

			linux,code = <KEY_POWER>;

		};

	};



	leds: gpio-leds {

		compatible = "gpio-leds";



		red {

			gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;

			label = "orion:red:led";

			pinctrl-names = "default";

			pinctrl-0 = <&led_ctl>;

			default-state = "on";

		};



		blue {

			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;

			label = "orion:blue:led";

			pinctrl-names = "default";

			pinctrl-0 = <&stby_pwren>;

			default-state = "off";

		};

	};



	vcc_18: vcc18-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_18";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_sys>;

	};



	/* supplies both host and otg */

	vcc_host: vcc-host-regulator {

		compatible = "regulator-fixed";

		gpio = <&gpio0 4 GPIO_ACTIVE_LOW>;

		pinctrl-names = "default";

		pinctrl-0 = <&host_vbus_drv>;

		regulator-name = "vcc_host";

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_sys>;

	};



	vcc_io: vcc-io-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_io";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_sys>;

	};



	vcc_lan: vcc-lan-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_lan";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_io>;

	};



	vcc_sd: vcc-sd-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_sd";

		gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_io>;

	};



	vcc_sys: vcc-sys-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_sys";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		regulator-always-on;

		regulator-boot-on;

	};



	vccio_sd: vcc-io-sd-regulator {

		compatible = "regulator-fixed";

		regulator-name= "vccio_sd";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_io>;

	};



	vccio_wl: vccio-wl-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vccio_wl";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_io>;

	};



	vdd_10: vdd-10-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vdd_10";

		regulator-min-microvolt = <1000000>;

		regulator-max-microvolt = <1000000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_sys>;

	};

};



&emmc {

	bus-width = <8>;

	cap-mmc-highspeed;

	disable-wp;

	keep-power-in-suspend;

	mmc-pwrseq = <&emmc_pwrseq>;

	mmc-hs200-1_2v;

	mmc-hs200-1_8v;

	non-removable;

	num-slots = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;

	status = "okay";

};



&gmac {

	assigned-clocks = <&cru SCLK_MAC>;

	assigned-clock-parents = <&ext_gmac>;

	clock_in_out = "input";

	phy-supply = <&vcc_lan>;

	phy-mode = "rgmii";

	pinctrl-names = "default";

	pinctrl-0 = <&rgmii_pins>;

	snps,reset-gpio = <&gpio3 12 0>;

	snps,reset-active-low;

	snps,reset-delays-us = <0 10000 1000000>;

	tx_delay = <0x30>;

	rx_delay = <0x10>;

	status = "ok";

};



&i2c0 {

	status = "okay";



	vdd_cpu: syr827@40 {

		compatible = "silergy,syr827";

		reg = <0x40>;

		fcs,suspend-voltage-selector = <1>;

		regulator-name = "vdd_cpu";

		regulator-enable-ramp-delay = <300>;

		regulator-min-microvolt = <712500>;

		regulator-max-microvolt = <1500000>;

		regulator-ramp-delay = <8000>;

		regulator-always-on;

		regulator-boot-on;

		vin-supply = <&vcc_sys>;

	};



	hym8563: hym8563@51 {

		compatible = "haoyu,hym8563";

		reg = <0x51>;

		#clock-cells = <0>;

		clock-frequency = <32768>;

		clock-output-names = "xin32k";

		/* rtc_int is not connected */

	};

};



&pinctrl {

	pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {

		bias-disable;

		drive-strength = <8>;

	};



	pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {

		bias-pull-up;

		drive-strength = <8>;

	};



	emmc {

		emmc_bus8: emmc-bus8 {

			rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 19 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 20 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 21 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 22 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 23 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 24 RK_FUNC_2 &pcfg_pull_up_drv_8ma>,

					<1 25 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;

		};



		emmc-clk {

			rockchip,pins = <2 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;

		};



		emmc-cmd {

			rockchip,pins = <1 26 RK_FUNC_2 &pcfg_pull_up_drv_8ma>;

		};



		emmc_reset: emmc-reset {

			rockchip,pins = <2 3 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	keys {

		pwr_key: pwr-key {

			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_down>;

		};

	};



	leds {

		stby_pwren: stby-pwren {

			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;

		};



		led_ctl: led-ctl {

			rockchip,pins = <3 29 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};



	sdmmc {

		sdmmc_clk: sdmmc-clk {

			rockchip,pins = <2 9 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;

		};



		sdmmc_cmd: sdmmc-cmd {

			rockchip,pins = <2 10 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;

		};



		sdmmc_cd: sdmmc-cd {

			rockchip,pins = <2 11 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;

		};



		sdmmc_bus1: sdmmc-bus1 {

			rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;

		};



		sdmmc_bus4: sdmmc-bus4 {

			rockchip,pins = <2 5 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,

					<2 6 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,

					<2 7 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,

					<2 8 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;

		};

	};



	usb {

		host_vbus_drv: host-vbus-drv {

			rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};



&saradc {

	vref-supply = <&vcc_18>;

	status = "okay";

};



&sdmmc {

	bus-width = <4>;

	clock-frequency = <50000000>;

	clock-freq-min-max = <400000 50000000>;

	cap-sd-highspeed;

	card-detect-delay = <200>;

	keep-power-in-suspend;

	num-slots = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;

	vmmc-supply = <&vcc_sd>;

	vqmmc-supply = <&vccio_sd>;

	status = "okay";

};



&uart2 {

	status = "okay";

};



&uart4 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart4_xfer>;

	status = "okay";

};



&usb_host0_ehci {

	status = "okay";

};



&usb_otg {

	status = "okay";

};



&wdt {

	status = "okay";

};

arch/arm64/boot/dts/rockchip/rk3368-r88.dts

+0 −1
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@@ -248,7 +248,6 @@ 
&sdio0 {

	assigned-clocks = <&cru SCLK_SDIO0>;

	assigned-clock-parents = <&cru PLL_CPLL>;

	broken-cd;

	bus-width = <4>;

	cap-sd-highspeed;

	cap-sdio-irq;

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -45,6 +45,7 @@ 
#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include <dt-bindings/soc/rockchip,boot-mode.h>

#include <dt-bindings/thermal/thermal.h>



/ {
@@ -639,6 +640,15 @@ 
			compatible = "rockchip,rk3368-pmu-io-voltage-domain";

			status = "disabled";

		};



		reboot-mode {

			compatible = "syscon-reboot-mode";

			offset = <0x200>;

			mode-normal = <BOOT_NORMAL>;

			mode-recovery = <BOOT_RECOVERY>;

			mode-bootloader = <BOOT_FASTBOOT>;

			mode-loader = <BOOT_BL_DOWNLOAD>;

		};

	};



	cru: clock-controller@ff760000 {

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