Commit 28f9d1a3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'mlxsw-spectrum_router-Add-GRE-tunnel-support-for-Spectrum-2' 



Ido Schimmel says:

====================
mlxsw: spectrum_router: Add GRE tunnel support for Spectrum-2

Nir says:

In Spectrum-2, HW implementation of layer 3 tunnels differs from
Spectrum-1 when it comes to the underlay routing table selection.
Spectrum-2 uses a dedicated RIF that points to the virtual router used
for forwarding the encapsulated packets, while Spectrum-1 explicitly
specifies the virtual router itself.

Patches #1 and #2 add additional fields in RITR - Router interface table
register and RTDP - Routing tunnel decap properties respectively, the
fields are required for the new underlay RIF needed for Spectrum-2.

Patches #3-4 allow different set of RIF operations per ASIC type. The
first patch splits the operations and the following patch sets RIF ops
according to ASIC type.

Patches #5-9 introduce small changes to existing code to allow existence
of a dedicated underlay RIF along with the underlay virtual router, and
to support that new type of RIF that has no device.

Patch #10 takes care of updating the tunnel decap properties egress
underlay RIF required for Spectrum-2.

Patch #11 adds the implementation of Spectrum-2 specific RIF operations
and essentially enables layer 3 GRE tunnels on Spectrum-2.

Finally patches #12-18 add tests for GRE IP-in-IP tunnels, both in flat
and hierarchical topologies.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 4e15cbe8 eb13feab

drivers/net/ethernet/mellanox/mlxsw/reg.h

+20 −3
Original line number Diff line number Diff line
@@ -5666,6 +5666,8 @@ enum mlxsw_reg_ritr_loopback_protocol { 
	MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4,

	/* IPinIP IPv6 underlay Unicast */

	MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV6,

	/* IPinIP generic - used for Spectrum-2 underlay RIF */

	MLXSW_REG_RITR_LOOPBACK_GENERIC,

};



/* reg_ritr_loopback_protocol
@@ -5706,6 +5708,13 @@ MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4); 
 */

MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);



/* reg_ritr_loopback_ipip_underlay_rif

 * Underlay ingress router interface.

 * Reserved for Spectrum.

 * Access: RW

 */

MLXSW_ITEM32(reg, ritr, loopback_ipip_underlay_rif, 0x14, 0, 16);



/* reg_ritr_loopback_ipip_usip*

 * Encapsulation Underlay source IP.

 * Access: RW
@@ -5821,11 +5830,12 @@ static inline void 
mlxsw_reg_ritr_loopback_ipip_common_pack(char *payload,

			    enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,

			    enum mlxsw_reg_ritr_loopback_ipip_options options,

			    u16 uvr_id, u32 gre_key)

			    u16 uvr_id, u16 underlay_rif, u32 gre_key)

{

	mlxsw_reg_ritr_loopback_ipip_type_set(payload, ipip_type);

	mlxsw_reg_ritr_loopback_ipip_options_set(payload, options);

	mlxsw_reg_ritr_loopback_ipip_uvr_set(payload, uvr_id);

	mlxsw_reg_ritr_loopback_ipip_underlay_rif_set(payload, underlay_rif);

	mlxsw_reg_ritr_loopback_ipip_gre_key_set(payload, gre_key);

}
@@ -5833,12 +5843,12 @@ static inline void 
mlxsw_reg_ritr_loopback_ipip4_pack(char *payload,

			    enum mlxsw_reg_ritr_loopback_ipip_type ipip_type,

			    enum mlxsw_reg_ritr_loopback_ipip_options options,

			    u16 uvr_id, u32 usip, u32 gre_key)

			    u16 uvr_id, u16 underlay_rif, u32 usip, u32 gre_key)

{

	mlxsw_reg_ritr_loopback_protocol_set(payload,

				    MLXSW_REG_RITR_LOOPBACK_PROTOCOL_IPIP_IPV4);

	mlxsw_reg_ritr_loopback_ipip_common_pack(payload, ipip_type, options,

						 uvr_id, gre_key);

						 uvr_id, underlay_rif, gre_key);

	mlxsw_reg_ritr_loopback_ipip_usip4_set(payload, usip);

}
@@ -7200,6 +7210,13 @@ MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4); 
 */

MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);



/* reg_rtdp_egress_router_interface

 * Underlay egress router interface.

 * Valid range is from 0 to cap_max_router_interfaces - 1

 * Access: RW

 */

MLXSW_ITEM32(reg, rtdp, egress_router_interface, 0x40, 0, 16);



/* IPinIP */



/* reg_rtdp_ipip_irif

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+2 −0
Original line number Diff line number Diff line
@@ -4094,6 +4094,7 @@ static int mlxsw_sp1_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->acl_tcam_ops = &mlxsw_sp1_acl_tcam_ops;

	mlxsw_sp->nve_ops_arr = mlxsw_sp1_nve_ops_arr;

	mlxsw_sp->mac_mask = mlxsw_sp1_mac_mask;

	mlxsw_sp->rif_ops_arr = mlxsw_sp1_rif_ops_arr;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info);

}
@@ -4110,6 +4111,7 @@ static int mlxsw_sp2_init(struct mlxsw_core *mlxsw_core, 
	mlxsw_sp->acl_tcam_ops = &mlxsw_sp2_acl_tcam_ops;

	mlxsw_sp->nve_ops_arr = mlxsw_sp2_nve_ops_arr;

	mlxsw_sp->mac_mask = mlxsw_sp2_mac_mask;

	mlxsw_sp->rif_ops_arr = mlxsw_sp2_rif_ops_arr;



	return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info);

}

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+6 −0
Original line number Diff line number Diff line
@@ -75,6 +75,11 @@ enum mlxsw_sp_rif_type { 
	MLXSW_SP_RIF_TYPE_MAX,

};



struct mlxsw_sp_rif_ops;



extern const struct mlxsw_sp_rif_ops *mlxsw_sp1_rif_ops_arr[];

extern const struct mlxsw_sp_rif_ops *mlxsw_sp2_rif_ops_arr[];



enum mlxsw_sp_fid_type {

	MLXSW_SP_FID_TYPE_8021Q,

	MLXSW_SP_FID_TYPE_8021D,
@@ -161,6 +166,7 @@ struct mlxsw_sp { 
	const struct mlxsw_sp_mr_tcam_ops *mr_tcam_ops;

	const struct mlxsw_sp_acl_tcam_ops *acl_tcam_ops;

	const struct mlxsw_sp_nve_ops **nve_ops_arr;

	const struct mlxsw_sp_rif_ops **rif_ops_arr;

};



static inline struct mlxsw_sp_upper *

drivers/net/ethernet/mellanox/mlxsw/spectrum_dpipe.c

+1 −1
Original line number Diff line number Diff line
@@ -220,7 +220,7 @@ start_again: 
	for (; i < rif_count; i++) {

		struct mlxsw_sp_rif *rif = mlxsw_sp_rif_by_index(mlxsw_sp, i);



		if (!rif)

		if (!rif || !mlxsw_sp_rif_dev(rif))

			continue;

		err = mlxsw_sp_erif_entry_get(mlxsw_sp, &entry, rif,

					      counters_enabled);

drivers/net/ethernet/mellanox/mlxsw/spectrum_ipip.c

+2 −0
Original line number Diff line number Diff line
@@ -145,6 +145,7 @@ mlxsw_sp_ipip_fib_entry_op_gre4_rtdp(struct mlxsw_sp *mlxsw_sp, 
				     struct mlxsw_sp_ipip_entry *ipip_entry)

{

	u16 rif_index = mlxsw_sp_ipip_lb_rif_index(ipip_entry->ol_lb);

	u16 ul_rif_id = mlxsw_sp_ipip_lb_ul_rif_id(ipip_entry->ol_lb);

	char rtdp_pl[MLXSW_REG_RTDP_LEN];

	struct ip_tunnel_parm parms;

	unsigned int type_check;
@@ -157,6 +158,7 @@ mlxsw_sp_ipip_fib_entry_op_gre4_rtdp(struct mlxsw_sp *mlxsw_sp, 
	ikey = mlxsw_sp_ipip_parms4_ikey(parms);



	mlxsw_reg_rtdp_pack(rtdp_pl, MLXSW_REG_RTDP_TYPE_IPIP, tunnel_index);

	mlxsw_reg_rtdp_egress_router_interface_set(rtdp_pl, ul_rif_id);



	type_check = has_ikey ?

		MLXSW_REG_RTDP_IPIP_TYPE_CHECK_ALLOW_GRE_KEY :

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