Commit 28ee8b09 authored by Sven Auhagen's avatar Sven Auhagen Committed by Herbert Xu
Browse files

crypto: marvell/cesa - irq balance 



Balance the irqs of the marvell cesa driver over all
available cpus.
Currently all interrupts are handled by the first CPU.

From my testing with IPSec AES 256 SHA256
on my clearfog base with 2 Cores I get a 2x speed increase:

Before the patch: 26.74 Kpps
With the patch: 56.11 Kpps

Signed-off-by: default avatarSven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent c6720415

drivers/crypto/marvell/cesa/cesa.c

+10 −1
Original line number Diff line number Diff line
@@ -438,7 +438,7 @@ static int mv_cesa_probe(struct platform_device *pdev) 
	struct mv_cesa_dev *cesa;

	struct mv_cesa_engine *engines;

	struct resource *res;

	int irq, ret, i;

	int irq, ret, i, cpu;

	u32 sram_size;



	if (cesa_dev) {
@@ -505,6 +505,8 @@ static int mv_cesa_probe(struct platform_device *pdev) 
			goto err_cleanup;

		}



		engine->irq = irq;



		/*

		 * Not all platforms can gate the CESA clocks: do not complain

		 * if the clock does not exist.
@@ -548,6 +550,10 @@ static int mv_cesa_probe(struct platform_device *pdev) 
		if (ret)

			goto err_cleanup;



		/* Set affinity */

		cpu = cpumask_local_spread(engine->id, NUMA_NO_NODE);

		irq_set_affinity_hint(irq, get_cpu_mask(cpu));



		crypto_init_queue(&engine->queue, CESA_CRYPTO_DEFAULT_MAX_QLEN);

		atomic_set(&engine->load, 0);

		INIT_LIST_HEAD(&engine->complete_queue);
@@ -570,6 +576,8 @@ err_cleanup: 
		clk_disable_unprepare(cesa->engines[i].zclk);

		clk_disable_unprepare(cesa->engines[i].clk);

		mv_cesa_put_sram(pdev, i);

		if (cesa->engines[i].irq > 0)

			irq_set_affinity_hint(cesa->engines[i].irq, NULL);

	}



	return ret;
@@ -586,6 +594,7 @@ static int mv_cesa_remove(struct platform_device *pdev) 
		clk_disable_unprepare(cesa->engines[i].zclk);

		clk_disable_unprepare(cesa->engines[i].clk);

		mv_cesa_put_sram(pdev, i);

		irq_set_affinity_hint(cesa->engines[i].irq, NULL);

	}



	return 0;

drivers/crypto/marvell/cesa/cesa.h

+1 −0
Original line number Diff line number Diff line
@@ -457,6 +457,7 @@ struct mv_cesa_engine { 
	atomic_t load;

	struct mv_cesa_tdma_chain chain;

	struct list_head complete_queue;

	int irq;

};



/**

CRA Git | Maintained and supported by SUSTech CRA and CCSE